X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Fboard%2Fballoon3-cpu.cfg;h=3ee840bda713db07f73f1031bcbc91ec824d2f3b;hb=0dd969d83badb6793519ee99dd8ab8579d5f59df;hp=8a646b765406828b76296f64aa4cae6b11052709;hpb=d87ee640c7a8e77a34d2d72185be157a97b39061;p=fw%2Fopenocd

diff --git a/tcl/board/balloon3-cpu.cfg b/tcl/board/balloon3-cpu.cfg
index 8a646b765..3ee840bda 100644
--- a/tcl/board/balloon3-cpu.cfg
+++ b/tcl/board/balloon3-cpu.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Config for balloon3 board, cpu JTAG port. http://balloonboard.org/
 # The board has separate JTAG ports for cpu and CPLD/FPGA devices
 # Chaining is done on IO interfaces if desired.
@@ -8,6 +10,7 @@ source [find target/pxa270.cfg]
 # Override this in the interface config for parallel dongles
 reset_config trst_and_srst separate
 
-# flash bank <driver> <base> <size> <chip_width> <bus_width>
+# flash bank <name> <driver> <base> <size> <chip_width> <bus_width> <target>
 # 29LV650 64Mbit Flash
-flash bank cfi 0x00000000 0x800000 2 2 0
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x00000000 0x800000 2 2 $_TARGETNAME