X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Fboard%2Fat91sam9g20-ek.cfg;h=04d9a197cc5a39ede7c6450ff986e3c22d67e4e2;hb=d8c81d72540a9e6a9f59412686332379ece1618f;hp=59ee4d2a38b91d9e6b071c6082d1a772e4e0b2d2;hpb=64d89d5ee1a554fbae8eb0a7231ccb2dc4428c1a;p=fw%2Fopenocd

diff --git a/tcl/board/at91sam9g20-ek.cfg b/tcl/board/at91sam9g20-ek.cfg
index 59ee4d2a3..04d9a197c 100644
--- a/tcl/board/at91sam9g20-ek.cfg
+++ b/tcl/board/at91sam9g20-ek.cfg
@@ -40,9 +40,7 @@ at91sam9 rdy_busy 0 0xfffff800 13
 at91sam9 ce 0 0xfffff800 14
 
 proc read_register {register} {
-        set result ""
-        mem2array result 32 $register 1
-        return $result(0)
+	return [read_memory $register 32 1]
 }
 
 proc at91sam9g20_reset_start { } {
@@ -153,7 +151,7 @@ proc at91sam9g20_reset_init { } {
 
 	nand probe nandflash_cs3
 
-	# The AT91SAM9G20-EK evaluation board has build-in serial data flash also.
+	# The AT91SAM9G20-EK evaluation board has built-in serial data flash also.
 
 	# Now setup SDRAM.  This is tricky and configuration is very important for reliability!  The current calculations
 	# are based on 2 x Micron MT48LC16M16A2-75 memory (4 M x 16 bit x 4 banks).  If you use this file as a reference