X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=tcl%2Fboard%2Fat91cap7a-stk-sdram.cfg;h=6da917ac7899c3f08979f9b2d30aa9e70d73b561;hb=4157732bd84c4e9e4b55357e1dc9a96078a35ee1;hp=9bc02e8c0383bd563d1cda73202112c6dbf7bc2c;hpb=1c021ed0afb5f9f7d9e8cbce53a4fe985a4c2235;p=fw%2Fopenocd

diff --git a/tcl/board/at91cap7a-stk-sdram.cfg b/tcl/board/at91cap7a-stk-sdram.cfg
index 9bc02e8c0..6da917ac7 100644
--- a/tcl/board/at91cap7a-stk-sdram.cfg
+++ b/tcl/board/at91cap7a-stk-sdram.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4394
 #
 # use combined on interfaces or targets that can't set TRST/SRST separately
@@ -28,28 +30,27 @@ target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAM
 
 $_TARGETNAME configure -event reset-start {
 	# start off real slow when we're running off internal RC oscillator
-	adapter_khz 32
+	adapter speed 32
 }
 
 proc peek32 {address} {
-	mem2array t 32 $address 1
-	return $t(0)
+	return [read_memory $address 32 1]
 }
 
 # Wait for an expression to be true with a timeout
 proc wait_state {expression} {
-	for {set i 0} {$i < 1000} {set i [expr $i + 1]} {
+	for {set i 0} {$i < 1000} {set i [expr {$i + 1}]} {
 		if {[uplevel 1 $expression] == 0} {
 			return
 		}
 	}
-	return -code 1 "Timed out"	
+	return -code 1 "Timed out"
 }
 
 # Use a global variable here to be able to tinker interactively with
 # post reset jtag frequency.
 global post_reset_khz
-# Danger!!!! Even 16MHz kinda works with this target, but 
+# Danger!!!! Even 16MHz kinda works with this target, but
 # it needs to be as low as 2000kHz to be stable.
 set post_reset_khz 2000
 
@@ -61,25 +62,25 @@ $_TARGETNAME configure -event reset-init {
 	mww 0xfffffd08 0xa5000001
 	# Enable main oscillator
 	mww 0xFFFFFc20  0x00000f01
-	wait_state {expr {([peek32 0xFFFFFC68] & 0x1) == 0}}  
+	wait_state {expr {([peek32 0xFFFFFC68] & 0x1) == 0}}
 
 	# Set PLLA to 96MHz
 	mww 0xFFFFFc28 0x20072801
-	wait_state {expr {([peek32 0xFFFFFC68] & 0x2) == 0}}  
+	wait_state {expr {([peek32 0xFFFFFC68] & 0x2) == 0}}
 
 	# Select prescaler
 	mww 0xFFFFFC30 0x00000004
-	wait_state {expr {([peek32 0xFFFFFC68] & 0x8) == 0}}  
+	wait_state {expr {([peek32 0xFFFFFC68] & 0x8) == 0}}
 
 	# Select master clock to 48MHz
 	mww 0xFFFFFC30 0x00000006
-	wait_state {expr {([peek32 0xFFFFFC68] & 0x8) == 0}}  
+	wait_state {expr {([peek32 0xFFFFFC68] & 0x8) == 0}}
 
 	echo "Master clock ok."
-	
+
 	# Now that we're up and running, crank up speed!
-	global post_reset_khz ;	adapter_khz $post_reset_khz
-	
+	global post_reset_khz ;	adapter speed $post_reset_khz
+
 	echo "Configuring the SDRAM controller..."
 
 	# Configure EBI Chip select for SDRAM
@@ -95,7 +96,7 @@ $_TARGETNAME configure -event reset-init {
 
 	# Configure SDRAMC CR
 	mww 0xFFFFEA08 0xA63392F9
- 
+
 	# NOP command
 	mww 0xFFFFEA00 0x1
 	mww 0x20000000 0
@@ -151,7 +152,7 @@ $_TARGETNAME configure -event reset-init {
 
 	#remap internal memory at address 0x0
 	mww 0xffffef00 0x3
-	
+
 	echo "SDRAM configuration ok."
 }
 
@@ -162,4 +163,3 @@ arm7_9 fast_memory_access enable
 
 #set _FLASHNAME $_CHIPNAME.flash
 #flash bank $_FLASHNAME at91sam7 0 0 0 0 $_TARGETNAME 0 0 0 0 0 0 0 18432
-