X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fxa51%2Fmain.c;h=99f2b902fcbb2bf9ff2e14c39ad93bb7cadfbd84;hb=48ba82a9755eae5da6e24d1381ea3bcf72ebb9ef;hp=f6ae8c8d8a4228d08778c4e6f1aedfac041203cd;hpb=a3d177d3e521b6905a6f503d371912c266b99f5f;p=fw%2Fsdcc

diff --git a/src/xa51/main.c b/src/xa51/main.c
index f6ae8c8d..99f2b902 100755
--- a/src/xa51/main.c
+++ b/src/xa51/main.c
@@ -42,8 +42,13 @@ static char *_xa51_keywords[] =
   NULL
 };
 
-extern int rewinds;
-void   _xa51_genAssemblerEnd () {
+/* rewinds declared in asm.c, function printCLine().
+ * Currently commented out.
+ *
+ * extern int rewinds;
+ */
+void   _xa51_genAssemblerEnd (FILE * of)
+{
   //fprintf (stderr, "Did %d rewind%c for c-line in asm comments\n", rewinds,
   //rewinds==1 ? '\0' : 's');
 }
@@ -89,6 +94,7 @@ _xa51_parseOptions (int *pargc, char **argv, int *i)
 static void
 _xa51_finaliseOptions (void)
 {
+  fprintf (stderr, "*** WARNING *** The XA51 port isn't yet complete\n");
   port->mem.default_local_map = istack;
   port->mem.default_globl_map = xdata;
   if (options.model!=MODEL_PAGE0) {
@@ -149,10 +155,12 @@ _xa51_genAssemblerPreamble (FILE * of)
     fprintf (of, "\t.dw\t__sdcc_gsinit_startup\n");
     fprintf (of, "\n");
     fprintf (of, "__sdcc_gsinit_startup:\n");
-    fprintf (of, "\tmov.b\t_SCR,#0x01\t; page zero mode\n");
+    fprintf (of, ";\tmov.b\t_SCR,#0x01\t; page zero mode\n");
+    fprintf (of, "\t.db 0x96,0x48,0x40,0x01\n");
     fprintf (of, "\tmov\tr7,#0x%04x\n", options.stack_loc);
     fprintf (of, "\tcall\t_external_startup\n");
     _xa51_genXINIT(of);
+    fprintf (of, "\t.area CSEG\t(CODE)\n");
     fprintf (of, "\tcall\t_main\n");
     fprintf (of, "\treset\t;main should not return\n");
   }
@@ -184,6 +192,30 @@ static bool cseCostEstimation (iCode *ic, iCode *pdic)
     return 1;
 }
 
+/* Indicate which extended bit operations this port supports */
+static bool
+hasExtBitOp (int op, int size)
+{
+  if (op == RRC
+      || op == RLC
+      || op == GETHBIT
+     )
+    return TRUE;
+  else
+    return FALSE;
+}
+
+/* Indicate the expense of an access to an output storage class */
+static int
+oclsExpense (struct memmap *oclass)
+{
+  if (IN_FARSPACE(oclass))
+    return 1;
+    
+  return 0;
+}
+
+
 /** $1 is always the basename.
     $2 is always the output file.
     $3 varies
@@ -192,13 +224,13 @@ static bool cseCostEstimation (iCode *ic, iCode *pdic)
 */
 static const char *_linkCmd[] =
 {
-  "xa_link", "", "$1", NULL
+  "xa_link", "", "\"$1\"", NULL
 };
 
 /* $3 is replaced by assembler.debug_opts resp. port->assembler.plain_opts */
 static const char *_asmCmd[] =
 {
-  "xa_rasm", "$l", "$3", "$1.asm", NULL
+  "xa_rasm", "$l", "$3", "\"$1.asm\"", NULL
 };
 
 /* Globals */
@@ -207,7 +239,9 @@ PORT xa51_port =
   TARGET_ID_XA51,
   "xa51",
   "MCU 80C51XA",       		/* Target name */
+  NULL,				/* Processor name */
   {
+    glue,
     FALSE,			/* Emit glue around main */
     MODEL_PAGE0,
     MODEL_PAGE0
@@ -225,7 +259,8 @@ PORT xa51_port =
     _linkCmd,
     NULL,
     NULL,
-    ".rel"
+    ".rel",
+    1
   },
   {
     _defaultRules
@@ -253,6 +288,7 @@ PORT xa51_port =
     NULL, // default global map
     1
   },
+  { NULL, NULL },
   {
     -1, // stack grows down
     0, // bank overhead NUY
@@ -265,9 +301,13 @@ PORT xa51_port =
   {
     2, -2
   },
+  {
+    xa51_emitDebuggerSymbol
+  },
   "_",
   _xa51_init,
   _xa51_parseOptions,
+  NULL,
   _xa51_finaliseOptions,
   _xa51_setDefaultOptions,
   xa51_assignRegisters,
@@ -277,12 +317,16 @@ PORT xa51_port =
   _xa51_genAssemblerEnd,
   _xa51_genIVT,
   _xa51_genXINIT,
+  NULL, 			/* genInitStartup */
   _xa51_reset_regparm,
   _xa51_regparm,
   NULL, // process_pragma()
   NULL, // getMangledFunctionName()
   NULL, // hasNativeMulFor()
+  hasExtBitOp,			/* hasExtBitOp */
+  oclsExpense,			/* oclsExpense */
   TRUE, // use_dw_for_init
+  TRUE,				/* little endian */
   0,				/* leave lt */
   0,				/* leave gt */
   1,				/* transform <= to ! > */