X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Ftest_sg.c;h=357f4366523fe5e4d4788a9bf3d7739c38685860;hb=16756fbe053f3e5efaf2973aebabeec201926f53;hp=a8a7022c80cb8e9c1aa854919271b84dda125b37;hpb=0f376a74a51cf3e3134b0e6f2ad0415f43968ed1;p=fw%2Fstlink

diff --git a/src/test_sg.c b/src/test_sg.c
index a8a7022..357f436 100644
--- a/src/test_sg.c
+++ b/src/test_sg.c
@@ -6,7 +6,31 @@
 
 #include <stdio.h>
 #include <stdlib.h>
+#include <string.h>
 #include "stlink-common.h"
+#include "uglylogging.h"
+
+#define LOG_TAG __FILE__
+#define DLOG(format, args...)         ugly_log(UDEBUG, LOG_TAG, format, ## args)
+#define ILOG(format, args...)         ugly_log(UINFO, LOG_TAG, format, ## args)
+#define WLOG(format, args...)         ugly_log(UWARN, LOG_TAG, format, ## args)
+#define fatal(format, args...)        ugly_log(UFATAL, LOG_TAG, format, ## args)
+
+static void __attribute__((unused)) mark_buf(stlink_t *sl) {
+    memset(sl->q_buf, 0, sizeof(sl->q_buf));
+    sl->q_buf[0] = 0xaa;
+    sl->q_buf[1] = 0xbb;
+    sl->q_buf[2] = 0xcc;
+    sl->q_buf[3] = 0xdd;
+    sl->q_buf[4] = 0x11;
+    sl->q_buf[15] = 0x22;
+    sl->q_buf[16] = 0x33;
+    sl->q_buf[63] = 0x44;
+    sl->q_buf[64] = 0x69;
+    sl->q_buf[1024 * 6 - 1] = 0x42; //6kB
+    sl->q_buf[1024 * 8 - 1] = 0x42; //8kB
+}
+
 
 int main(int argc, char *argv[]) {
 	// set scpi lib debug level: 0 for no debug info, 10 for lots
@@ -40,14 +64,14 @@ int main(int argc, char *argv[]) {
 	//stlink_force_debug(sl);
 	stlink_reset(sl);
 	stlink_status(sl);
-#if 0
 	// core system control block
 	stlink_read_mem32(sl, 0xe000ed00, 4);
-	DD(sl, "cpu id base register: SCB_CPUID = got 0x%08x expect 0x411fc231", read_uint32(sl->q_buf, 0));
+	DLOG("cpu id base register: SCB_CPUID = got 0x%08x expect 0x411fc231\n", read_uint32(sl->q_buf, 0));
 	// no MPU
 	stlink_read_mem32(sl, 0xe000ed90, 4);
-	DD(sl, "mpu type register: MPU_TYPER = got 0x%08x expect 0x0", read_uint32(sl->q_buf, 0));
+	DLOG("mpu type register: MPU_TYPER = got 0x%08x expect 0x0\n", read_uint32(sl->q_buf, 0));
 
+#if 0
 	stlink_read_mem32(sl, 0xe000edf0, 4);
 	DD(sl, "DHCSR = 0x%08x", read_uint32(sl->q_buf, 0));
 
@@ -65,23 +89,23 @@ int main(int argc, char *argv[]) {
 #define LED_GREEN	(1<<9) // pin 9
 	stlink_read_mem32(sl, GPIOC_CRH, 4);
 	uint32_t io_conf = read_uint32(sl->q_buf, 0);
-	DD(sl, "GPIOC_CRH = 0x%08x", io_conf);
+	DLOG("GPIOC_CRH = 0x%08x\n", io_conf);
 
 	// set: general purpose output push-pull, output mode, max speed 10 MHz.
 	write_uint32(sl->q_buf, 0x44444411);
 	stlink_write_mem32(sl, GPIOC_CRH, 4);
 
-	clear_buf(sl);
+	memset(sl->q_buf, 0, sizeof(sl->q_buf));
 	for (int i = 0; i < 100; i++) {
 		write_uint32(sl->q_buf, LED_BLUE | LED_GREEN);
 		stlink_write_mem32(sl, GPIOC_ODR, 4);
 		/* stlink_read_mem32(sl, 0x4001100c, 4); */
 		/* DD(sl, "GPIOC_ODR = 0x%08x", read_uint32(sl->q_buf, 0)); */
-		delay(100);
+		usleep(100 * 1000);
 
-		clear_buf(sl);
+		memset(sl->q_buf, 0, sizeof(sl->q_buf));
 		stlink_write_mem32(sl, GPIOC_ODR, 4); // PC lo
-		delay(100);
+        usleep(100 * 1000);
 	}
 	write_uint32(sl->q_buf, io_conf); // set old state
 
@@ -105,21 +129,19 @@ int main(int argc, char *argv[]) {
 #if 0
 	// sram 0x20000000 8kB
 	fputs("\n++++++++++ read/write 8bit, sram at 0x2000 0000 ++++++++++++++++\n\n", stderr);
-	clear_buf(sl);
-	stlink_write_mem8(sl, 0x20000000, 16);
+    memset(sl->q_buf, 0, sizeof(sl->q_buf));
+    mark_buf(sl);
+	//stlink_write_mem8(sl, 0x20000000, 16);
 
-	mark_buf(sl);
-	stlink_write_mem8(sl, 0x20000000, 1);
-	stlink_write_mem8(sl, 0x20000001, 1);
+	//stlink_write_mem8(sl, 0x20000000, 1);
+	//stlink_write_mem8(sl, 0x20000001, 1);
 	stlink_write_mem8(sl, 0x2000000b, 3);
 	stlink_read_mem32(sl, 0x20000000, 16);
 #endif
 #if 0
 	// a not aligned mem32 access doesn't work indeed
 	fputs("\n++++++++++ read/write 32bit, sram at 0x2000 0000 ++++++++++++++++\n\n", stderr);
-	clear_buf(sl);
-	stlink_write_mem8(sl, 0x20000000, 32);
-
+    memset(sl->q_buf, 0, sizeof(sl->q_buf));
 	mark_buf(sl);
 	stlink_write_mem32(sl, 0x20000000, 1);
 	stlink_read_mem32(sl, 0x20000000, 16);
@@ -137,6 +159,7 @@ int main(int argc, char *argv[]) {
 #if 0
 	// sram 0x20000000 8kB
 	fputs("++++++++++ read/write 32bit, sram at 0x2000 0000 ++++++++++++\n", stderr);
+    memset(sl->q_buf, 0, sizeof(sl->q_buf));
 	mark_buf(sl);
 	stlink_write_mem8(sl, 0x20000000, 64);
 	stlink_read_mem32(sl, 0x20000000, 64);
@@ -146,13 +169,14 @@ int main(int argc, char *argv[]) {
 	stlink_read_mem32(sl, 0x20000000, 1024 * 6);
 	stlink_read_mem32(sl, 0x20000000 + 1024 * 6, 1024 * 2);
 #endif
-#if 0
-	stlink_read_all_regs(sl);
+#if 1
+    reg regs;
+	stlink_read_all_regs(sl, &regs);
 	stlink_step(sl);
 	fputs("++++++++++ write r0 = 0x12345678\n", stderr);
 	stlink_write_reg(sl, 0x12345678, 0);
-	stlink_read_reg(sl, 0);
-	stlink_read_all_regs(sl);
+	stlink_read_reg(sl, 0, &regs);
+	stlink_read_all_regs(sl, &regs);
 #endif
 #if 0
 	stlink_run(sl);