X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Ftarget%2Fxscale.c;h=edab4f9fc72bb50e7c54560b15a43d1e9c13594b;hb=e66bb9d3121eef35c312997aacb401847249a5cb;hp=e54033fe9f7d10331f09243d50f69c53fefff01d;hpb=1039ed3ff2138c9d0d820b143159738f8a73cb2e;p=fw%2Fopenocd diff --git a/src/target/xscale.c b/src/target/xscale.c index e54033fe9..edab4f9fc 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -59,7 +59,7 @@ /* forward declarations */ static int xscale_resume(struct target *, int current, - uint32_t address, int handle_breakpoints, int debug_execution); + target_addr_t address, int handle_breakpoints, int debug_execution); static int xscale_debug_entry(struct target *); static int xscale_restore_banked(struct target *); static int xscale_get_reg(struct reg *reg); @@ -129,7 +129,7 @@ static const struct xscale_reg xscale_reg_arch_info[] = { /* convenience wrapper to access XScale specific registers */ static int xscale_set_reg_u32(struct reg *reg, uint32_t value) { - uint8_t buf[4]; + uint8_t buf[4] = { 0 }; buf_set_u32(buf, 0, 32, value); @@ -138,11 +138,11 @@ static int xscale_set_reg_u32(struct reg *reg, uint32_t value) static const char xscale_not[] = "target is not an XScale"; -static int xscale_verify_pointer(struct command_context *cmd_ctx, +static int xscale_verify_pointer(struct command_invocation *cmd, struct xscale_common *xscale) { if (xscale->common_magic != XSCALE_COMMON_MAGIC) { - command_print(cmd_ctx, xscale_not); + command_print(cmd, xscale_not); return ERROR_TARGET_INVALID; } return ERROR_OK; @@ -154,9 +154,9 @@ static int xscale_jtag_set_instr(struct jtag_tap *tap, uint32_t new_instr, tap_s if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) { struct scan_field field; - uint8_t scratch[4]; + uint8_t scratch[4] = { 0 }; - memset(&field, 0, sizeof field); + memset(&field, 0, sizeof(field)); field.num_bits = tap->ir_length; field.out_value = scratch; buf_set_u32(scratch, 0, field.num_bits, new_instr); @@ -186,7 +186,7 @@ static int xscale_read_dcsr(struct target *target) buf_set_u32(&field0, 1, 1, xscale->hold_rst); buf_set_u32(&field0, 2, 1, xscale->external_debug_break); - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 3; fields[0].out_value = &field0; @@ -212,8 +212,8 @@ static int xscale_read_dcsr(struct target *target) return retval; } - xscale->reg_cache->reg_list[XSCALE_DCSR].dirty = 0; - xscale->reg_cache->reg_list[XSCALE_DCSR].valid = 1; + xscale->reg_cache->reg_list[XSCALE_DCSR].dirty = false; + xscale->reg_cache->reg_list[XSCALE_DCSR].valid = true; /* write the register with the value we just read * on this second pass, only the first bit of field0 is guaranteed to be 0) @@ -259,7 +259,7 @@ static int xscale_receive(struct target *target, uint32_t *buffer, int num_words path[1] = TAP_DRCAPTURE; path[2] = TAP_DRSHIFT; - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 3; uint8_t tmp; @@ -367,7 +367,7 @@ static int xscale_read_tx(struct target *target, int consume) noconsume_path[4] = TAP_DREXIT2; noconsume_path[5] = TAP_DRSHIFT; - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 3; fields[0].in_value = &field0_in; @@ -404,8 +404,7 @@ static int xscale_read_tx(struct target *target, int consume) } gettimeofday(&now, NULL); - if ((now.tv_sec > timeout.tv_sec) || - ((now.tv_sec == timeout.tv_sec) && (now.tv_usec > timeout.tv_usec))) { + if (timeval_compare(&now, &timeout) > 0) { LOG_ERROR("time out reading TX register"); return ERROR_TARGET_TIMEOUT; } @@ -443,7 +442,7 @@ static int xscale_write_rx(struct target *target) XSCALE_DBGRX << xscale->xscale_variant, TAP_IDLE); - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 3; fields[0].out_value = &field0_out; @@ -515,7 +514,7 @@ static int xscale_send(struct target *target, const uint8_t *buffer, int count, TAP_IDLE); static const uint8_t t0; - uint8_t t1[4]; + uint8_t t1[4] = { 0 }; static const uint8_t t2 = 1; struct scan_field fields[3] = { { .num_bits = 3, .out_value = &t0 }, @@ -599,7 +598,7 @@ static int xscale_write_dcsr(struct target *target, int hold_rst, int ext_dbg_br buf_set_u32(&field0, 1, 1, xscale->hold_rst); buf_set_u32(&field0, 2, 1, xscale->external_debug_break); - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 3; fields[0].out_value = &field0; @@ -625,8 +624,8 @@ static int xscale_write_dcsr(struct target *target, int hold_rst, int ext_dbg_br return retval; } - xscale->reg_cache->reg_list[XSCALE_DCSR].dirty = 0; - xscale->reg_cache->reg_list[XSCALE_DCSR].valid = 1; + xscale->reg_cache->reg_list[XSCALE_DCSR].dirty = false; + xscale->reg_cache->reg_list[XSCALE_DCSR].valid = true; return ERROR_OK; } @@ -646,8 +645,8 @@ static unsigned int parity(unsigned int v) static int xscale_load_ic(struct target *target, uint32_t va, uint32_t buffer[8]) { struct xscale_common *xscale = target_to_xscale(target); - uint8_t packet[4]; - uint8_t cmd; + uint8_t packet[4] = { 0 }; + uint8_t cmd = 0; int word; struct scan_field fields[2]; @@ -667,7 +666,7 @@ static int xscale_load_ic(struct target *target, uint32_t va, uint32_t buffer[8] /* virtual address of desired cache line */ buf_set_u32(packet, 0, 27, va >> 5); - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 6; fields[0].out_value = &cmd; @@ -700,8 +699,8 @@ static int xscale_load_ic(struct target *target, uint32_t va, uint32_t buffer[8] static int xscale_invalidate_ic_line(struct target *target, uint32_t va) { struct xscale_common *xscale = target_to_xscale(target); - uint8_t packet[4]; - uint8_t cmd; + uint8_t packet[4] = { 0 }; + uint8_t cmd = 0; struct scan_field fields[2]; xscale_jtag_set_instr(target->tap, @@ -714,7 +713,7 @@ static int xscale_invalidate_ic_line(struct target *target, uint32_t va) /* virtual address of desired cache line */ buf_set_u32(packet, 0, 27, va >> 5); - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 6; fields[0].out_value = &cmd; @@ -869,21 +868,21 @@ static int xscale_debug_entry(struct target *target) /* move r0 from buffer to register cache */ buf_set_u32(arm->core_cache->reg_list[0].value, 0, 32, buffer[0]); - arm->core_cache->reg_list[0].dirty = 1; - arm->core_cache->reg_list[0].valid = 1; + arm->core_cache->reg_list[0].dirty = true; + arm->core_cache->reg_list[0].valid = true; LOG_DEBUG("r0: 0x%8.8" PRIx32 "", buffer[0]); /* move pc from buffer to register cache */ buf_set_u32(arm->pc->value, 0, 32, buffer[1]); - arm->pc->dirty = 1; - arm->pc->valid = 1; + arm->pc->dirty = true; + arm->pc->valid = true; LOG_DEBUG("pc: 0x%8.8" PRIx32 "", buffer[1]); /* move data from buffer to register cache */ for (i = 1; i <= 7; i++) { buf_set_u32(arm->core_cache->reg_list[i].value, 0, 32, buffer[1 + i]); - arm->core_cache->reg_list[i].dirty = 1; - arm->core_cache->reg_list[i].valid = 1; + arm->core_cache->reg_list[i].dirty = true; + arm->core_cache->reg_list[i].valid = true; LOG_DEBUG("r%i: 0x%8.8" PRIx32 "", i, buffer[i + 1]); } @@ -921,7 +920,7 @@ static int xscale_debug_entry(struct target *target) /* mark xscale regs invalid to ensure they are retrieved from the * debug handler if requested */ for (i = 0; i < xscale->reg_cache->num_regs; i++) - xscale->reg_cache->reg_list[i].valid = 0; + xscale->reg_cache->reg_list[i].valid = false; /* examine debug reason */ xscale_read_dcsr(target); @@ -1120,7 +1119,7 @@ static void xscale_free_trace_data(struct xscale_common *xscale) } static int xscale_resume(struct target *target, int current, - uint32_t address, int handle_breakpoints, int debug_execution) + target_addr_t address, int handle_breakpoints, int debug_execution) { struct xscale_common *xscale = target_to_xscale(target); struct arm *arm = &xscale->arm; @@ -1165,7 +1164,8 @@ static int xscale_resume(struct target *target, int current, enum trace_mode saved_trace_mode; /* there's a breakpoint at the current PC, we have to step over it */ - LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", breakpoint->address); + LOG_DEBUG("unset breakpoint at " TARGET_ADDR_FMT "", + breakpoint->address); xscale_unset_breakpoint(target, breakpoint); /* calculate PC of next instruction */ @@ -1222,7 +1222,8 @@ static int xscale_resume(struct target *target, int current, LOG_DEBUG("disable single-step"); xscale_disable_single_step(target); - LOG_DEBUG("set breakpoint at 0x%8.8" PRIx32 "", breakpoint->address); + LOG_DEBUG("set breakpoint at " TARGET_ADDR_FMT "", + breakpoint->address); xscale_set_breakpoint(target, breakpoint); } } @@ -1384,7 +1385,7 @@ static int xscale_step_inner(struct target *target, int current, } static int xscale_step(struct target *target, int current, - uint32_t address, int handle_breakpoints) + target_addr_t address, int handle_breakpoints) { struct arm *arm = target_to_arm(target); struct breakpoint *breakpoint = NULL; @@ -1550,7 +1551,7 @@ static int xscale_deassert_reset(struct target *target) * coprocessors, trace data, etc. */ address = xscale->handler_address; - for (unsigned binary_size = sizeof xscale_debug_handler; + for (unsigned binary_size = sizeof(xscale_debug_handler); binary_size > 0; binary_size -= buf_cnt, buffer += buf_cnt) { uint32_t cache_line[8]; @@ -1778,7 +1779,7 @@ dirty: return ERROR_OK; } -static int xscale_read_memory(struct target *target, uint32_t address, +static int xscale_read_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer) { struct xscale_common *xscale = target_to_xscale(target); @@ -1786,7 +1787,7 @@ static int xscale_read_memory(struct target *target, uint32_t address, uint32_t i; int retval; - LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32, + LOG_DEBUG("address: " TARGET_ADDR_FMT ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32, address, size, count); @@ -1864,7 +1865,7 @@ static int xscale_read_memory(struct target *target, uint32_t address, return ERROR_OK; } -static int xscale_read_phys_memory(struct target *target, uint32_t address, +static int xscale_read_phys_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer) { struct xscale_common *xscale = target_to_xscale(target); @@ -1879,13 +1880,13 @@ static int xscale_read_phys_memory(struct target *target, uint32_t address, return ERROR_FAIL; } -static int xscale_write_memory(struct target *target, uint32_t address, +static int xscale_write_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer) { struct xscale_common *xscale = target_to_xscale(target); int retval; - LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32, + LOG_DEBUG("address: " TARGET_ADDR_FMT ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32, address, size, count); @@ -1963,7 +1964,7 @@ static int xscale_write_memory(struct target *target, uint32_t address, return ERROR_OK; } -static int xscale_write_phys_memory(struct target *target, uint32_t address, +static int xscale_write_phys_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer) { struct xscale_common *xscale = target_to_xscale(target); @@ -2422,8 +2423,8 @@ static int xscale_get_reg(struct reg *reg) xscale_read_tx(target, 1); buf_cpy(xscale->reg_cache->reg_list[XSCALE_TX].value, reg->value, 32); - reg->dirty = 0; - reg->valid = 1; + reg->dirty = false; + reg->valid = true; } return ERROR_OK; @@ -2653,16 +2654,16 @@ static inline void xscale_branch_address(struct xscale_trace_data *trace_data, static inline void xscale_display_instruction(struct target *target, uint32_t pc, struct arm_instruction *instruction, - struct command_context *cmd_ctx) + struct command_invocation *cmd) { int retval = xscale_read_instruction(target, pc, instruction); if (retval == ERROR_OK) - command_print(cmd_ctx, "%s", instruction->text); + command_print(cmd, "%s", instruction->text); else - command_print(cmd_ctx, "0x%8.8" PRIx32 "\t", pc); + command_print(cmd, "0x%8.8" PRIx32 "\t", pc); } -static int xscale_analyze_trace(struct target *target, struct command_context *cmd_ctx) +static int xscale_analyze_trace(struct target *target, struct command_invocation *cmd) { struct xscale_common *xscale = target_to_xscale(target); struct xscale_trace_data *trace_data = xscale->trace.data; @@ -2770,7 +2771,7 @@ static int xscale_analyze_trace(struct target *target, struct command_context *c count = trace_data->entries[i].data & 0x0f; for (j = 0; j < count; j++) { xscale_display_instruction(target, current_pc, &instruction, - cmd_ctx); + cmd); current_pc += xscale->trace.core_state == ARM_STATE_ARM ? 4 : 2; } @@ -2778,7 +2779,7 @@ static int xscale_analyze_trace(struct target *target, struct command_context *c * rollover and some exceptions: undef, swi, prefetch abort. */ if ((trace_msg_type == 15) || (exception > 0 && exception < 4)) { xscale_display_instruction(target, current_pc, &instruction, - cmd_ctx); + cmd); current_pc += xscale->trace.core_state == ARM_STATE_ARM ? 4 : 2; } @@ -2786,13 +2787,13 @@ static int xscale_analyze_trace(struct target *target, struct command_context *c continue; if (exception) { - command_print(cmd_ctx, "--- exception %i ---", exception); + command_print(cmd, "--- exception %i ---", exception); continue; } /* not exception or rollover; next instruction is a branch and is * not included in the count */ - xscale_display_instruction(target, current_pc, &instruction, cmd_ctx); + xscale_display_instruction(target, current_pc, &instruction, cmd); /* for direct branches, extract branch destination from instruction */ if ((trace_msg_type == 8) || (trace_msg_type == 12)) { @@ -2812,7 +2813,7 @@ static int xscale_analyze_trace(struct target *target, struct command_context *c } if (current_pc == 0) - command_print(cmd_ctx, "address unknown"); + command_print(cmd, "address unknown"); continue; } @@ -2854,7 +2855,7 @@ static int xscale_analyze_trace(struct target *target, struct command_context *c /* display remaining instructions */ for (i = 0; i < gap_count; i++) { - xscale_display_instruction(target, current_pc, &instruction, cmd_ctx); + xscale_display_instruction(target, current_pc, &instruction, cmd); current_pc += xscale->trace.core_state == ARM_STATE_ARM ? 4 : 2; } @@ -2889,11 +2890,12 @@ static void xscale_build_reg_cache(struct target *target) for (i = 0; i < num_regs; i++) { (*cache_p)->reg_list[i].name = xscale_reg_list[i]; (*cache_p)->reg_list[i].value = calloc(4, 1); - (*cache_p)->reg_list[i].dirty = 0; - (*cache_p)->reg_list[i].valid = 0; + (*cache_p)->reg_list[i].dirty = false; + (*cache_p)->reg_list[i].valid = false; (*cache_p)->reg_list[i].size = 32; (*cache_p)->reg_list[i].arch_info = &arch_info[i]; (*cache_p)->reg_list[i].type = &xscale_reg_type; + (*cache_p)->reg_list[i].exist = true; arch_info[i] = xscale_reg_arch_info[i]; arch_info[i].target = target; } @@ -2979,7 +2981,7 @@ static int xscale_init_arch_info(struct target *target, /* prepare ARMv4/5 specific information */ arm->arch_info = xscale; - arm->core_type = ARM_MODE_ANY; + arm->core_type = ARM_CORE_TYPE_STD; arm->read_core_reg = xscale_read_core_reg; arm->write_core_reg = xscale_write_core_reg; arm->full_context = xscale_full_context; @@ -3002,7 +3004,7 @@ static int xscale_target_create(struct target *target, Jim_Interp *interp) { struct xscale_common *xscale; - if (sizeof xscale_debug_handler > 0x800) { + if (sizeof(xscale_debug_handler) > 0x800) { LOG_ERROR("debug_handler.bin: larger than 2kb"); return ERROR_FAIL; } @@ -3031,7 +3033,7 @@ COMMAND_HANDLER(xscale_handle_debug_handler_command) } xscale = target_to_xscale(target); - retval = xscale_verify_pointer(CMD_CTX, xscale); + retval = xscale_verify_pointer(CMD, xscale); if (retval != ERROR_OK) return retval; @@ -3065,7 +3067,7 @@ COMMAND_HANDLER(xscale_handle_cache_clean_address_command) return ERROR_FAIL; } xscale = target_to_xscale(target); - retval = xscale_verify_pointer(CMD_CTX, xscale); + retval = xscale_verify_pointer(CMD, xscale); if (retval != ERROR_OK) return retval; @@ -3085,15 +3087,15 @@ COMMAND_HANDLER(xscale_handle_cache_info_command) struct xscale_common *xscale = target_to_xscale(target); int retval; - retval = xscale_verify_pointer(CMD_CTX, xscale); + retval = xscale_verify_pointer(CMD, xscale); if (retval != ERROR_OK) return retval; - return armv4_5_handle_cache_info_command(CMD_CTX, &xscale->armv4_5_mmu.armv4_5_cache); + return armv4_5_handle_cache_info_command(CMD, &xscale->armv4_5_mmu.armv4_5_cache); } static int xscale_virt2phys(struct target *target, - uint32_t virtual, uint32_t *physical) + target_addr_t virtual, target_addr_t *physical) { struct xscale_common *xscale = target_to_xscale(target); uint32_t cb; @@ -3130,12 +3132,12 @@ COMMAND_HANDLER(xscale_handle_mmu_command) struct xscale_common *xscale = target_to_xscale(target); int retval; - retval = xscale_verify_pointer(CMD_CTX, xscale); + retval = xscale_verify_pointer(CMD, xscale); if (retval != ERROR_OK) return retval; if (target->state != TARGET_HALTED) { - command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); + command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME); return ERROR_OK; } @@ -3149,7 +3151,7 @@ COMMAND_HANDLER(xscale_handle_mmu_command) xscale->armv4_5_mmu.mmu_enabled = enable; } - command_print(CMD_CTX, "mmu %s", + command_print(CMD, "mmu %s", (xscale->armv4_5_mmu.mmu_enabled) ? "enabled" : "disabled"); return ERROR_OK; @@ -3160,12 +3162,12 @@ COMMAND_HANDLER(xscale_handle_idcache_command) struct target *target = get_current_target(CMD_CTX); struct xscale_common *xscale = target_to_xscale(target); - int retval = xscale_verify_pointer(CMD_CTX, xscale); + int retval = xscale_verify_pointer(CMD, xscale); if (retval != ERROR_OK) return retval; if (target->state != TARGET_HALTED) { - command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); + command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME); return ERROR_OK; } @@ -3194,7 +3196,7 @@ COMMAND_HANDLER(xscale_handle_idcache_command) xscale->armv4_5_mmu.armv4_5_cache.i_cache_enabled : xscale->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled; const char *msg = enabled ? "enabled" : "disabled"; - command_print(CMD_CTX, "%s %s", CMD_NAME, msg); + command_print(CMD, "%s %s", CMD_NAME, msg); return ERROR_OK; } @@ -3221,11 +3223,10 @@ COMMAND_HANDLER(xscale_handle_vector_catch_command) uint32_t catch = 0; struct reg *dcsr_reg = &xscale->reg_cache->reg_list[XSCALE_DCSR]; - retval = xscale_verify_pointer(CMD_CTX, xscale); + retval = xscale_verify_pointer(CMD, xscale); if (retval != ERROR_OK) return retval; - dcsr_value = buf_get_u32(dcsr_reg->value, 0, 32); if (CMD_ARGC > 0) { if (CMD_ARGC == 1) { if (strcmp(CMD_ARGV[0], "all") == 0) { @@ -3256,7 +3257,7 @@ COMMAND_HANDLER(xscale_handle_vector_catch_command) dcsr_value = buf_get_u32(dcsr_reg->value, 0, 32); for (unsigned i = 0; i < ARRAY_SIZE(vec_ids); i++) { - command_print(CMD_CTX, "%15s: %s", vec_ids[i].name, + command_print(CMD, "%15s: %s", vec_ids[i].name, (dcsr_value & vec_ids[i].mask) ? "catch" : "ignore"); } @@ -3271,23 +3272,23 @@ COMMAND_HANDLER(xscale_handle_vector_table_command) int err = 0; int retval; - retval = xscale_verify_pointer(CMD_CTX, xscale); + retval = xscale_verify_pointer(CMD, xscale); if (retval != ERROR_OK) return retval; if (CMD_ARGC == 0) { /* print current settings */ int idx; - command_print(CMD_CTX, "active user-set static vectors:"); + command_print(CMD, "active user-set static vectors:"); for (idx = 1; idx < 8; idx++) if (xscale->static_low_vectors_set & (1 << idx)) - command_print(CMD_CTX, + command_print(CMD, "low %d: 0x%" PRIx32, idx, xscale->static_low_vectors[idx]); for (idx = 1; idx < 8; idx++) if (xscale->static_high_vectors_set & (1 << idx)) - command_print(CMD_CTX, + command_print(CMD, "high %d: 0x%" PRIx32, idx, xscale->static_high_vectors[idx]); @@ -3329,12 +3330,12 @@ COMMAND_HANDLER(xscale_handle_trace_buffer_command) uint32_t dcsr_value; int retval; - retval = xscale_verify_pointer(CMD_CTX, xscale); + retval = xscale_verify_pointer(CMD, xscale); if (retval != ERROR_OK) return retval; if (target->state != TARGET_HALTED) { - command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); + command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME); return ERROR_OK; } @@ -3353,7 +3354,7 @@ COMMAND_HANDLER(xscale_handle_trace_buffer_command) if (CMD_ARGC >= 3) COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], buffcount); if (buffcount < 1) { /* invalid */ - command_print(CMD_CTX, "fill buffer count must be > 0"); + command_print(CMD, "fill buffer count must be > 0"); xscale->trace.mode = XSCALE_TRACE_DISABLED; return ERROR_COMMAND_SYNTAX_ERROR; } @@ -3370,11 +3371,11 @@ COMMAND_HANDLER(xscale_handle_trace_buffer_command) if (xscale->trace.mode != XSCALE_TRACE_DISABLED) { char fill_string[12]; sprintf(fill_string, "fill %d", xscale->trace.buffer_fill); - command_print(CMD_CTX, "trace buffer enabled (%s)", + command_print(CMD, "trace buffer enabled (%s)", (xscale->trace.mode == XSCALE_TRACE_FILL) ? fill_string : "wrap"); } else - command_print(CMD_CTX, "trace buffer disabled"); + command_print(CMD, "trace buffer disabled"); dcsr_value = buf_get_u32(xscale->reg_cache->reg_list[XSCALE_DCSR].value, 0, 32); if (xscale->trace.mode == XSCALE_TRACE_FILL) @@ -3394,14 +3395,14 @@ COMMAND_HANDLER(xscale_handle_trace_image_command) if (CMD_ARGC < 1) return ERROR_COMMAND_SYNTAX_ERROR; - retval = xscale_verify_pointer(CMD_CTX, xscale); + retval = xscale_verify_pointer(CMD, xscale); if (retval != ERROR_OK) return retval; if (xscale->trace.image) { image_close(xscale->trace.image); free(xscale->trace.image); - command_print(CMD_CTX, "previously loaded image found and closed"); + command_print(CMD, "previously loaded image found and closed"); } xscale->trace.image = malloc(sizeof(struct image)); @@ -3433,12 +3434,12 @@ COMMAND_HANDLER(xscale_handle_dump_trace_command) struct fileio *file; int retval; - retval = xscale_verify_pointer(CMD_CTX, xscale); + retval = xscale_verify_pointer(CMD, xscale); if (retval != ERROR_OK) return retval; if (target->state != TARGET_HALTED) { - command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); + command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME); return ERROR_OK; } @@ -3448,7 +3449,7 @@ COMMAND_HANDLER(xscale_handle_dump_trace_command) trace_data = xscale->trace.data; if (!trace_data) { - command_print(CMD_CTX, "no trace data collected"); + command_print(CMD, "no trace data collected"); return ERROR_OK; } @@ -3481,11 +3482,11 @@ COMMAND_HANDLER(xscale_handle_analyze_trace_buffer_command) struct xscale_common *xscale = target_to_xscale(target); int retval; - retval = xscale_verify_pointer(CMD_CTX, xscale); + retval = xscale_verify_pointer(CMD, xscale); if (retval != ERROR_OK) return retval; - xscale_analyze_trace(target, CMD_CTX); + xscale_analyze_trace(target, CMD); return ERROR_OK; } @@ -3496,12 +3497,12 @@ COMMAND_HANDLER(xscale_handle_cp15) struct xscale_common *xscale = target_to_xscale(target); int retval; - retval = xscale_verify_pointer(CMD_CTX, xscale); + retval = xscale_verify_pointer(CMD, xscale); if (retval != ERROR_OK) return retval; if (target->state != TARGET_HALTED) { - command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); + command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME); return ERROR_OK; } uint32_t reg_no = 0; @@ -3535,7 +3536,7 @@ COMMAND_HANDLER(xscale_handle_cp15) reg_no = XSCALE_CPACCESS; break; default: - command_print(CMD_CTX, "invalid register number"); + command_print(CMD, "invalid register number"); return ERROR_COMMAND_SYNTAX_ERROR; } reg = &xscale->reg_cache->reg_list[reg_no]; @@ -3547,7 +3548,7 @@ COMMAND_HANDLER(xscale_handle_cp15) /* read cp15 control register */ xscale_get_reg(reg); value = buf_get_u32(reg->value, 0, 32); - command_print(CMD_CTX, "%s (/%i): 0x%" PRIx32 "", reg->name, (int)(reg->size), + command_print(CMD, "%s (/%i): 0x%" PRIx32 "", reg->name, (int)(reg->size), value); } else if (CMD_ARGC == 2) { uint32_t value; @@ -3576,6 +3577,7 @@ static const struct command_registration xscale_exec_command_handlers[] = { .handler = xscale_handle_cache_info_command, .mode = COMMAND_EXEC, .help = "display information about CPU caches", + .usage = "", }, { .name = "mmu", @@ -3702,6 +3704,7 @@ struct target_type xscale_target = { .deassert_reset = xscale_deassert_reset, /* REVISIT on some cores, allow exporting iwmmxt registers ... */ + .get_gdb_arch = arm_get_gdb_arch, .get_gdb_reg_list = arm_get_gdb_reg_list, .read_memory = xscale_read_memory,