X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Ftarget%2Fmips_ejtag.h;h=c64e858a3dc5579750dc5dcc634c13fa0d63a6b6;hb=5db10c0559c6ae346e93621db5cd6db98bde422d;hp=ade1b4c709efb13d4a302c9f43ecda0d14c7a380;hpb=2279c23cdeaea05839a28ff3addf12b9b0f5357e;p=fw%2Fopenocd

diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h
index ade1b4c70..c64e858a3 100644
--- a/src/target/mips_ejtag.h
+++ b/src/target/mips_ejtag.h
@@ -36,6 +36,11 @@
 #define EJTAG_INST_TCBCONTROLA	0x10
 #define EJTAG_INST_TCBCONTROLB	0x11
 #define EJTAG_INST_TCBDATA		0x12
+#define EJTAG_INST_TCBCONTROLC	0x13
+#define EJTAG_INST_PCSAMPLE		0x14
+#define EJTAG_INST_TCBCONTROLD	0x15
+#define EJTAG_INST_TCBCONTROLE	0x16
+#define EJTAG_INST_FDC			0x17
 #define EJTAG_INST_BYPASS		0xFF
 
 /* microchip PIC32MX specific instructions */
@@ -183,6 +188,9 @@ struct mips_ejtag {
 	uint32_t idcode;
 	uint32_t ejtag_ctrl;
 	int fast_access_save;
+	uint32_t config_regs;	/* number of config registers read */
+	uint32_t config[4];	/* cp0 config to config3 */
+
 	uint32_t reg8;
 	uint32_t reg9;
 	unsigned scan_delay;
@@ -216,7 +224,7 @@ struct mips_ejtag {
 void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, uint32_t new_instr);
 int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info);
 int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info);
-int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode);
+int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info);
 void mips_ejtag_add_scan_96(struct mips_ejtag *ejtag_info,
 			    uint32_t ctrl, uint32_t data, uint8_t *in_scan_buf);
 void mips_ejtag_drscan_32_out(struct mips_ejtag *ejtag_info, uint32_t data);