X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Ftarget%2Fmips32.h;h=4fe61bcdedf4569e386bd40117caba2d6f167513;hb=c68c2751f309103cc7116464e6c3242d54c1007b;hp=1ac682b88ac644d327c1c7c21c954db0ac3c2f5f;hpb=8193f17c3aeb948ca8f70ed3361e8b2bccefffed;p=fw%2Fopenocd

diff --git a/src/target/mips32.h b/src/target/mips32.h
index 1ac682b88..4fe61bcde 100644
--- a/src/target/mips32.h
+++ b/src/target/mips32.h
@@ -77,6 +77,7 @@ struct mips32_core_reg
 #define MIPS32_OP_ADDI	0x08
 #define MIPS32_OP_AND	0x24
 #define MIPS32_OP_COP0	0x10
+#define MIPS32_OP_JR	0x08
 #define MIPS32_OP_LUI	0x0F
 #define MIPS32_OP_LW	0x23
 #define MIPS32_OP_LBU	0x24
@@ -103,6 +104,7 @@ struct mips32_core_reg
 #define MIPS32_B(off)				MIPS32_BEQ(0, 0, off)
 #define MIPS32_BEQ(src,tar,off)		MIPS32_I_INST(MIPS32_OP_BEQ, src, tar, off)
 #define MIPS32_BNE(src,tar,off)		MIPS32_I_INST(MIPS32_OP_BNE, src, tar, off)
+#define MIPS32_JR(reg)				MIPS32_R_INST(0, reg, 0, 0, 0, MIPS32_OP_JR)
 #define MIPS32_MFC0(gpr, cpr, sel)	MIPS32_R_INST(MIPS32_OP_COP0, MIPS32_COP0_MF, gpr, cpr, 0, sel)
 #define MIPS32_MTC0(gpr,cpr, sel)	MIPS32_R_INST(MIPS32_OP_COP0, MIPS32_COP0_MT, gpr, cpr, 0, sel)
 #define MIPS32_LBU(reg, off, base)	MIPS32_I_INST(MIPS32_OP_LBU, base, reg, off)
@@ -121,7 +123,7 @@ struct mips32_core_reg
 /* ejtag specific instructions */
 #define MIPS32_DRET					0x4200001F
 #define MIPS32_SDBBP				0x7000003F
-#define MIPS16_SDBBP 				0xE801
+#define MIPS16_SDBBP				0xE801
 
 int mips32_arch_state(struct target *target);
 
@@ -147,7 +149,6 @@ int mips32_examine(struct target *target);
 
 int mips32_register_commands(struct command_context *cmd_ctx);
 
-int mips32_invalidate_core_regs(struct target *target);
 int mips32_get_gdb_reg_list(struct target *target,
 		struct reg **reg_list[], int *reg_list_size);