X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Ftarget%2Fmips32.c;h=4782067bf58d5b23521798ce9407cfe534c35c69;hb=524d79ebe74e28d751c88e665aabac2ea4d04e5c;hp=79215b5f3f0d91844c08786b3385bfacd16ba553;hpb=4da551732eceee87085ec6b159bef6693c704835;p=fw%2Fopenocd

diff --git a/src/target/mips32.c b/src/target/mips32.c
index 79215b5f3..4782067bf 100644
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -559,6 +559,13 @@ int mips32_configure_break_unit(struct target *target)
 			return retval;
 	}
 
+	/* check if target endianness settings matches debug control register */
+	if ( (  (dcr & EJTAG_DCR_ENM) && (target->endianness == TARGET_LITTLE_ENDIAN) ) ||
+		( !(dcr & EJTAG_DCR_ENM) && (target->endianness == TARGET_BIG_ENDIAN)    ) )
+	{
+		LOG_WARNING("DCR endianness settings does not match target settings");
+	}
+
 	LOG_DEBUG("DCR 0x%" PRIx32 " numinst %i numdata %i", dcr, mips32->num_inst_bpoints,
 			mips32->num_data_bpoints);