X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Ftarget%2Fetm.c;h=fec0a69a09d9e1aa2054ccf4d2f11c431207579e;hb=86173cdbddde781b19ac630602f2d450a59b32b5;hp=e2846ad08f9b196ec9e5b710501279f3ef4c24a7;hpb=a28eaa85f73759bb189a46308642502c9fa5aa4b;p=fw%2Fopenocd diff --git a/src/target/etm.c b/src/target/etm.c index e2846ad08..fec0a69a0 100644 --- a/src/target/etm.c +++ b/src/target/etm.c @@ -21,40 +21,28 @@ #include "config.h" #endif -#include - #include "etm.h" #include "etb.h" - -#include "armv4_5.h" +#include "image.h" #include "arm7_9_common.h" #include "arm_disassembler.h" -#include "arm_simulator.h" - -#include "log.h" -#include "arm_jtag.h" -#include "types.h" -#include "binarybuffer.h" -#include "target.h" -#include "register.h" -#include "jtag.h" -#include "fileio.h" -#include /* ETM register access functionality * */ -bitfield_desc_t etm_comms_ctrl_bitfield_desc[] = +#if 0 +static bitfield_desc_t etm_comms_ctrl_bitfield_desc[] = { {"R", 1}, {"W", 1}, {"reserved", 26}, {"version", 4} }; +#endif -int etm_reg_arch_info[] = +static int etm_reg_arch_info[] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, @@ -72,7 +60,7 @@ int etm_reg_arch_info[] = 0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, }; -int etm_reg_arch_size_info[] = +static int etm_reg_arch_size_info[] = { 32, 32, 17, 8, 3, 9, 32, 16, 17, 26, 25, 8, 17, 32, 32, 17, @@ -90,7 +78,7 @@ int etm_reg_arch_size_info[] = 17, 17, 17, 17, 32, 32, 32, 32 }; -char* etm_reg_list[] = +static char* etm_reg_list[] = { "ETM_CTRL", "ETM_CONFIG", @@ -205,16 +193,11 @@ char* etm_reg_list[] = "ETM_CONTEXTID_COMPARATOR_MASK" }; -int etm_reg_arch_type = -1; - -int etm_get_reg(reg_t *reg); -int etm_set_reg(reg_t *reg, u32 value); -int etm_set_reg_w_exec(reg_t *reg, u8 *buf); +static int etm_reg_arch_type = -1; -int etm_write_reg(reg_t *reg, u32 value); -int etm_read_reg(reg_t *reg); +static int etm_get_reg(reg_t *reg); -command_t *etm_cmd = NULL; +static command_t *etm_cmd = NULL; reg_cache_t* etm_build_reg_cache(target_t *target, arm_jtag_t *jtag_info, etm_context_t *etm_ctx) { @@ -283,6 +266,7 @@ int etm_setup(target_t *target) arm7_9_common_t *arm7_9 = armv4_5->arch_info; etm_context_t *etm_ctx = arm7_9->etm_ctx; reg_t *etm_ctrl_reg = &arm7_9->etm_ctx->reg_cache->reg_list[ETM_CTRL]; + /* initialize some ETM control register settings */ etm_get_reg(etm_ctrl_reg); etm_ctrl_value = buf_get_u32(etm_ctrl_reg->value, 0, etm_ctrl_reg->size); @@ -312,6 +296,7 @@ int etm_setup(target_t *target) int etm_get_reg(reg_t *reg) { int retval; + if ((retval = etm_read_reg(reg)) != ERROR_OK) { LOG_ERROR("BUG: error scheduling etm register read"); @@ -327,56 +312,48 @@ int etm_get_reg(reg_t *reg) return ERROR_OK; } -int etm_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) +int etm_read_reg_w_check(reg_t *reg, uint8_t* check_value, uint8_t* check_mask) { etm_reg_t *etm_reg = reg->arch_info; - u8 reg_addr = etm_reg->addr & 0x7f; + uint8_t reg_addr = etm_reg->addr & 0x7f; scan_field_t fields[3]; LOG_DEBUG("%i", etm_reg->addr); - jtag_add_end_state(TAP_RTI); + jtag_set_end_state(TAP_IDLE); arm_jtag_scann(etm_reg->jtag_info, 0x6); arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr, NULL); fields[0].tap = etm_reg->jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = reg->value; - fields[0].out_mask = NULL; fields[0].in_value = NULL; - fields[0].in_check_value = NULL; - fields[0].in_check_mask = NULL; - fields[0].in_handler = NULL; - fields[0].in_handler_priv = NULL; + fields[0].check_value = NULL; + fields[0].check_mask = NULL; fields[1].tap = etm_reg->jtag_info->tap; fields[1].num_bits = 7; fields[1].out_value = malloc(1); buf_set_u32(fields[1].out_value, 0, 7, reg_addr); - fields[1].out_mask = NULL; fields[1].in_value = NULL; - fields[1].in_check_value = NULL; - fields[1].in_check_mask = NULL; - fields[1].in_handler = NULL; - fields[1].in_handler_priv = NULL; + fields[1].check_value = NULL; + fields[1].check_mask = NULL; fields[2].tap = etm_reg->jtag_info->tap; fields[2].num_bits = 1; fields[2].out_value = malloc(1); buf_set_u32(fields[2].out_value, 0, 1, 0); - fields[2].out_mask = NULL; fields[2].in_value = NULL; - fields[2].in_check_value = NULL; - fields[2].in_check_mask = NULL; - fields[2].in_handler = NULL; - fields[2].in_handler_priv = NULL; + fields[2].check_value = NULL; + fields[2].check_mask = NULL; - jtag_add_dr_scan(3, fields, -1); + jtag_add_dr_scan(3, fields, jtag_get_end_state()); fields[0].in_value = reg->value; - jtag_set_check_value(fields+0, check_value, check_mask, NULL); + fields[0].check_value = check_value; + fields[0].check_mask = check_mask; - jtag_add_dr_scan(3, fields, -1); + jtag_add_dr_scan_check(3, fields, jtag_get_end_state()); free(fields[1].out_value); free(fields[2].out_value); @@ -392,6 +369,7 @@ int etm_read_reg(reg_t *reg) int etm_set_reg(reg_t *reg, u32 value) { int retval; + if ((retval = etm_write_reg(reg, value)) != ERROR_OK) { LOG_ERROR("BUG: error scheduling etm register write"); @@ -405,9 +383,10 @@ int etm_set_reg(reg_t *reg, u32 value) return ERROR_OK; } -int etm_set_reg_w_exec(reg_t *reg, u8 *buf) +int etm_set_reg_w_exec(reg_t *reg, uint8_t *buf) { int retval; + etm_set_reg(reg, buf_get_u32(buf, 0, reg->size)); if ((retval = jtag_execute_queue()) != ERROR_OK) @@ -421,53 +400,37 @@ int etm_set_reg_w_exec(reg_t *reg, u8 *buf) int etm_write_reg(reg_t *reg, u32 value) { etm_reg_t *etm_reg = reg->arch_info; - u8 reg_addr = etm_reg->addr & 0x7f; + uint8_t reg_addr = etm_reg->addr & 0x7f; scan_field_t fields[3]; LOG_DEBUG("%i: 0x%8.8x", etm_reg->addr, value); - jtag_add_end_state(TAP_RTI); + jtag_set_end_state(TAP_IDLE); arm_jtag_scann(etm_reg->jtag_info, 0x6); arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr, NULL); fields[0].tap = etm_reg->jtag_info->tap; fields[0].num_bits = 32; - fields[0].out_value = malloc(4); + uint8_t tmp1[4]; + fields[0].out_value = tmp1; buf_set_u32(fields[0].out_value, 0, 32, value); - fields[0].out_mask = NULL; fields[0].in_value = NULL; - fields[0].in_check_value = NULL; - fields[0].in_check_mask = NULL; - fields[0].in_handler = NULL; - fields[0].in_handler_priv = NULL; fields[1].tap = etm_reg->jtag_info->tap; fields[1].num_bits = 7; - fields[1].out_value = malloc(1); + uint8_t tmp2; + fields[1].out_value = &tmp2; buf_set_u32(fields[1].out_value, 0, 7, reg_addr); - fields[1].out_mask = NULL; fields[1].in_value = NULL; - fields[1].in_check_value = NULL; - fields[1].in_check_mask = NULL; - fields[1].in_handler = NULL; - fields[1].in_handler_priv = NULL; fields[2].tap = etm_reg->jtag_info->tap; fields[2].num_bits = 1; - fields[2].out_value = malloc(1); + uint8_t tmp3; + fields[2].out_value = &tmp3; buf_set_u32(fields[2].out_value, 0, 1, 1); - fields[2].out_mask = NULL; fields[2].in_value = NULL; - fields[2].in_check_value = NULL; - fields[2].in_check_mask = NULL; - fields[2].in_handler = NULL; - fields[2].in_handler_priv = NULL; - - jtag_add_dr_scan(3, fields, -1); - free(fields[0].out_value); - free(fields[1].out_value); - free(fields[2].out_value); + jtag_add_dr_scan(3, fields, jtag_get_end_state()); return ERROR_OK; } @@ -480,13 +443,12 @@ int etm_store_reg(reg_t *reg) /* ETM trace analysis functionality * */ -extern etm_capture_driver_t etb_capture_driver; extern etm_capture_driver_t etm_dummy_capture_driver; #if BUILD_OOCD_TRACE == 1 extern etm_capture_driver_t oocd_trace_capture_driver; #endif -etm_capture_driver_t *etm_capture_drivers[] = +static etm_capture_driver_t *etm_capture_drivers[] = { &etb_capture_driver, &etm_dummy_capture_driver, @@ -508,7 +470,7 @@ char *etmv1v1_branch_reason_strings[] = "reserved", }; -int etm_read_instruction(etm_context_t *ctx, arm_instruction_t *instruction) +static int etm_read_instruction(etm_context_t *ctx, arm_instruction_t *instruction) { int i; int section = -1; @@ -538,7 +500,7 @@ int etm_read_instruction(etm_context_t *ctx, arm_instruction_t *instruction) if (ctx->core_state == ARMV4_5_STATE_ARM) { - u8 buf[4]; + uint8_t buf[4]; if ((retval = image_read_section(ctx->image, section, ctx->current_pc - ctx->image->sections[section].base_address, 4, buf, &size_read)) != ERROR_OK) @@ -551,7 +513,7 @@ int etm_read_instruction(etm_context_t *ctx, arm_instruction_t *instruction) } else if (ctx->core_state == ARMV4_5_STATE_THUMB) { - u8 buf[2]; + uint8_t buf[2]; if ((retval = image_read_section(ctx->image, section, ctx->current_pc - ctx->image->sections[section].base_address, 2, buf, &size_read)) != ERROR_OK) @@ -576,7 +538,7 @@ int etm_read_instruction(etm_context_t *ctx, arm_instruction_t *instruction) return ERROR_OK; } -int etmv1_next_packet(etm_context_t *ctx, u8 *packet, int apo) +static int etmv1_next_packet(etm_context_t *ctx, uint8_t *packet, int apo) { while (ctx->data_index < ctx->trace_depth) { @@ -641,13 +603,13 @@ int etmv1_next_packet(etm_context_t *ctx, u8 *packet, int apo) return -1; } -int etmv1_branch_address(etm_context_t *ctx) +static int etmv1_branch_address(etm_context_t *ctx) { int retval; - u8 packet; + uint8_t packet; int shift = 0; int apo; - int i; + u32 i; /* quit analysis if less than two cycles are left in the trace * because we can't extract the APO */ @@ -727,10 +689,10 @@ int etmv1_branch_address(etm_context_t *ctx) return 0; } -int etmv1_data(etm_context_t *ctx, int size, u32 *data) +static int etmv1_data(etm_context_t *ctx, int size, u32 *data) { int j; - u8 buf[4]; + uint8_t buf[4]; int retval; for (j = 0; j < size; j++) @@ -756,7 +718,7 @@ int etmv1_data(etm_context_t *ctx, int size, u32 *data) return 0; } -int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx) +static int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx) { int retval; arm_instruction_t instruction; @@ -776,7 +738,7 @@ int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx) while (ctx->pipe_index < ctx->trace_depth) { - u8 pipestat = ctx->trace_data[ctx->pipe_index].pipestat; + uint8_t pipestat = ctx->trace_data[ctx->pipe_index].pipestat; u32 next_pc = ctx->current_pc; u32 old_data_index = ctx->data_index; u32 old_data_half = ctx->data_half; @@ -883,7 +845,7 @@ int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx) continue; /* indirect branch to the exception vector means an exception occured */ - if (((ctx->last_branch >= 0x0) && (ctx->last_branch <= 0x20)) + if ((ctx->last_branch <= 0x20) || ((ctx->last_branch >= 0xffff0000) && (ctx->last_branch <= 0xffff0020))) { if ((ctx->last_branch & 0xff) == 0x10) @@ -939,7 +901,7 @@ int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx) if (ctx->tracemode & ETMV1_TRACE_ADDR) { - u8 packet; + uint8_t packet; int shift = 0; do { @@ -996,9 +958,9 @@ int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx) if ((pipestat == STAT_IE) || (pipestat == STAT_ID)) { if (((instruction.type == ARM_B) || - (instruction.type == ARM_BL) || - (instruction.type == ARM_BLX)) && - (instruction.info.b_bl_bx_blx.target_address != -1)) + (instruction.type == ARM_BL) || + (instruction.type == ARM_BLX)) && + (instruction.info.b_bl_bx_blx.target_address != 0xffffffff)) { next_pc = instruction.info.b_bl_bx_blx.target_address; } @@ -1049,7 +1011,7 @@ int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx) return ERROR_OK; } -int handle_etm_tracemode_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int handle_etm_tracemode_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target; armv4_5_common_t *armv4_5; @@ -1229,7 +1191,7 @@ int handle_etm_tracemode_command(struct command_context_s *cmd_ctx, char *cmd, c return ERROR_OK; } -int handle_etm_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int handle_etm_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target; armv4_5_common_t *armv4_5; @@ -1243,11 +1205,10 @@ int handle_etm_config_command(struct command_context_s *cmd_ctx, char *cmd, char return ERROR_COMMAND_SYNTAX_ERROR; } - target = get_target_by_num(strtoul(args[0], NULL, 0)); - + target = get_target(args[0]); if (!target) { - LOG_ERROR("target number '%s' not defined", args[0]); + LOG_ERROR("target '%s' not defined", args[0]); return ERROR_FAIL; } @@ -1429,7 +1390,7 @@ int handle_etm_info_command(struct command_context_s *cmd_ctx, char *cmd, char * return ERROR_OK; } -int handle_etm_status_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int handle_etm_status_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target; armv4_5_common_t *armv4_5; @@ -1477,7 +1438,7 @@ int handle_etm_status_command(struct command_context_s *cmd_ctx, char *cmd, char return ERROR_OK; } -int handle_etm_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int handle_etm_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target; armv4_5_common_t *armv4_5; @@ -1536,14 +1497,14 @@ int handle_etm_image_command(struct command_context_s *cmd_ctx, char *cmd, char return ERROR_OK; } -int handle_etm_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int handle_etm_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { fileio_t file; target_t *target; armv4_5_common_t *armv4_5; arm7_9_common_t *arm7_9; etm_context_t *etm_ctx; - int i; + u32 i; if (argc != 1) { @@ -1604,14 +1565,14 @@ int handle_etm_dump_command(struct command_context_s *cmd_ctx, char *cmd, char * return ERROR_OK; } -int handle_etm_load_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int handle_etm_load_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { fileio_t file; target_t *target; armv4_5_common_t *armv4_5; arm7_9_common_t *arm7_9; etm_context_t *etm_ctx; - int i; + u32 i; if (argc != 1) { @@ -1663,7 +1624,7 @@ int handle_etm_load_command(struct command_context_s *cmd_ctx, char *cmd, char * fileio_read_u32(&file, &etm_ctx->trace_depth); etm_ctx->trace_data = malloc(sizeof(etmv1_trace_data_t) * etm_ctx->trace_depth); - if(etm_ctx->trace_data == NULL) + if (etm_ctx->trace_data == NULL) { command_print(cmd_ctx, "not enough memory to perform operation"); fileio_close(&file); @@ -1686,7 +1647,7 @@ int handle_etm_load_command(struct command_context_s *cmd_ctx, char *cmd, char * return ERROR_OK; } -int handle_etm_trigger_percent_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int handle_etm_trigger_percent_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target; armv4_5_common_t *armv4_5; @@ -1713,7 +1674,7 @@ int handle_etm_trigger_percent_command(struct command_context_s *cmd_ctx, char * if ((new_value < 2) || (new_value > 100)) { - command_print(cmd_ctx, "valid settings are 2% to 100%"); + command_print(cmd_ctx, "valid settings are 2%% to 100%%"); } else { @@ -1726,7 +1687,7 @@ int handle_etm_trigger_percent_command(struct command_context_s *cmd_ctx, char * return ERROR_OK; } -int handle_etm_start_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int handle_etm_start_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target; armv4_5_common_t *armv4_5; @@ -1771,7 +1732,7 @@ int handle_etm_start_command(struct command_context_s *cmd_ctx, char *cmd, char return ERROR_OK; } -int handle_etm_stop_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int handle_etm_stop_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target; armv4_5_common_t *armv4_5; @@ -1807,7 +1768,7 @@ int handle_etm_stop_command(struct command_context_s *cmd_ctx, char *cmd, char * return ERROR_OK; } -int handle_etm_analyze_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +static int handle_etm_analyze_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target; armv4_5_common_t *armv4_5; @@ -1831,7 +1792,7 @@ int handle_etm_analyze_command(struct command_context_s *cmd_ctx, char *cmd, cha if ((retval = etmv1_analyze_trace(etm_ctx, cmd_ctx)) != ERROR_OK) { - switch(retval) + switch (retval) { case ERROR_ETM_ANALYSIS_FAILED: command_print(cmd_ctx, "further analysis failed (corrupted trace data or just end of data"); @@ -1854,7 +1815,8 @@ int etm_register_commands(struct command_context_s *cmd_ctx) { etm_cmd = register_command(cmd_ctx, NULL, "etm", NULL, COMMAND_ANY, "Embedded Trace Macrocell"); - register_command(cmd_ctx, etm_cmd, "config", handle_etm_config_command, COMMAND_CONFIG, "etm config "); + register_command(cmd_ctx, etm_cmd, "config", handle_etm_config_command, + COMMAND_CONFIG, "etm config "); return ERROR_OK; } @@ -1862,12 +1824,13 @@ int etm_register_commands(struct command_context_s *cmd_ctx) int etm_register_user_commands(struct command_context_s *cmd_ctx) { register_command(cmd_ctx, etm_cmd, "tracemode", handle_etm_tracemode_command, - COMMAND_EXEC, "configure trace mode " + " "); register_command(cmd_ctx, etm_cmd, "info", handle_etm_info_command, COMMAND_EXEC, "display info about the current target's ETM"); - register_command(cmd_ctx, etm_cmd, "trigger_percent ", handle_etm_trigger_percent_command, + register_command(cmd_ctx, etm_cmd, "trigger_percent", handle_etm_trigger_percent_command, COMMAND_EXEC, "amount () of trace buffer to be filled after the trigger occured"); register_command(cmd_ctx, etm_cmd, "status", handle_etm_status_command, COMMAND_EXEC, "display current target's ETM status");