X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Ftarget%2Farm_adi_v5.c;h=f8a2e2278fc33c000e8ce798f04e4846a1dfe769;hb=fb164bca55ec5a1c9c70837b576e1d43426cd05b;hp=7df0d4f8ca8bc6349575f0eb7520f3717bc99055;hpb=0136977c40e41cdaab5d775c4e370763006ad99c;p=fw%2Fopenocd diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 7df0d4f8c..f8a2e2278 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -100,13 +100,13 @@ static uint32_t max_tar_block_size(uint32_t tar_autoincr_block, uint32_t address * @param apsel Number of the AP to (implicitly) use with further * transactions. This normally identifies a MEM-AP. */ -void dap_ap_select(struct adiv5_dap *dap,uint8_t apsel) +void dap_ap_select(struct adiv5_dap *dap,uint8_t ap) { - uint32_t select_apsel = (apsel << 24) & 0xFF000000; + uint32_t new_ap = (ap << 24) & 0xFF000000; - if (select_apsel != dap->apsel) + if (new_ap != dap->ap_current) { - dap->apsel = select_apsel; + dap->ap_current = new_ap; /* Switching AP invalidates cached values. * Values MUST BE UPDATED BEFORE AP ACCESS. */ @@ -270,11 +270,11 @@ int mem_ap_write_atomic_u32(struct adiv5_dap *dap, uint32_t address, * Write a buffer in target order (little endian) * * * *****************************************************************************/ -int mem_ap_write_buf_u32(struct adiv5_dap *dap, uint8_t *buffer, int count, uint32_t address) +int mem_ap_write_buf_u32(struct adiv5_dap *dap, const uint8_t *buffer, int count, uint32_t address) { int wcount, blocksize, writecount, errorcount = 0, retval = ERROR_OK; uint32_t adr = address; - uint8_t* pBuffer = buffer; + const uint8_t* pBuffer = buffer; count >>= 2; wcount = count; @@ -343,7 +343,7 @@ int mem_ap_write_buf_u32(struct adiv5_dap *dap, uint8_t *buffer, int count, uint } static int mem_ap_write_buf_packed_u16(struct adiv5_dap *dap, - uint8_t *buffer, int count, uint32_t address) + const uint8_t *buffer, int count, uint32_t address) { int retval = ERROR_OK; int wcount, blocksize, writecount, i; @@ -424,7 +424,7 @@ static int mem_ap_write_buf_packed_u16(struct adiv5_dap *dap, return retval; } -int mem_ap_write_buf_u16(struct adiv5_dap *dap, uint8_t *buffer, int count, uint32_t address) +int mem_ap_write_buf_u16(struct adiv5_dap *dap, const uint8_t *buffer, int count, uint32_t address) { int retval = ERROR_OK; @@ -456,7 +456,7 @@ int mem_ap_write_buf_u16(struct adiv5_dap *dap, uint8_t *buffer, int count, uint } static int mem_ap_write_buf_packed_u8(struct adiv5_dap *dap, - uint8_t *buffer, int count, uint32_t address) + const uint8_t *buffer, int count, uint32_t address) { int retval = ERROR_OK; int wcount, blocksize, writecount, i; @@ -532,7 +532,7 @@ static int mem_ap_write_buf_packed_u8(struct adiv5_dap *dap, return retval; } -int mem_ap_write_buf_u8(struct adiv5_dap *dap, uint8_t *buffer, int count, uint32_t address) +int mem_ap_write_buf_u8(struct adiv5_dap *dap, const uint8_t *buffer, int count, uint32_t address) { int retval = ERROR_OK; @@ -882,6 +882,80 @@ int mem_ap_read_buf_u8(struct adiv5_dap *dap, uint8_t *buffer, return retval; } +/*--------------------------------------------------------------------*/ +/* Wrapping function with selection of AP */ +/*--------------------------------------------------------------------*/ +int mem_ap_sel_read_u32(struct adiv5_dap *swjdp, uint8_t ap, + uint32_t address, uint32_t *value) +{ + dap_ap_select(swjdp, ap); + return mem_ap_read_u32(swjdp, address, value); +} + +int mem_ap_sel_write_u32(struct adiv5_dap *swjdp, uint8_t ap, + uint32_t address, uint32_t value) +{ + dap_ap_select(swjdp, ap); + return mem_ap_write_u32(swjdp, address, value); +} + +int mem_ap_sel_read_atomic_u32(struct adiv5_dap *swjdp, uint8_t ap, + uint32_t address, uint32_t *value) +{ + dap_ap_select(swjdp, ap); + return mem_ap_read_atomic_u32(swjdp, address, value); +} + +int mem_ap_sel_write_atomic_u32(struct adiv5_dap *swjdp, uint8_t ap, + uint32_t address, uint32_t value) +{ + dap_ap_select(swjdp, ap); + return mem_ap_write_atomic_u32(swjdp, address, value); +} + +int mem_ap_sel_read_buf_u8(struct adiv5_dap *swjdp, uint8_t ap, + uint8_t *buffer, int count, uint32_t address) +{ + dap_ap_select(swjdp, ap); + return mem_ap_read_buf_u8(swjdp, buffer, count, address); +} + +int mem_ap_sel_read_buf_u16(struct adiv5_dap *swjdp, uint8_t ap, + uint8_t *buffer, int count, uint32_t address) +{ + dap_ap_select(swjdp, ap); + return mem_ap_read_buf_u16(swjdp, buffer, count, address); +} + +int mem_ap_sel_read_buf_u32(struct adiv5_dap *swjdp, uint8_t ap, + uint8_t *buffer, int count, uint32_t address) +{ + dap_ap_select(swjdp, ap); + return mem_ap_read_buf_u32(swjdp, buffer, count, address); +} + +int mem_ap_sel_write_buf_u8(struct adiv5_dap *swjdp, uint8_t ap, + const uint8_t *buffer, int count, uint32_t address) +{ + dap_ap_select(swjdp, ap); + return mem_ap_write_buf_u8(swjdp, buffer, count, address); +} + +int mem_ap_sel_write_buf_u16(struct adiv5_dap *swjdp, uint8_t ap, + const uint8_t *buffer, int count, uint32_t address) +{ + dap_ap_select(swjdp, ap); + return mem_ap_write_buf_u16(swjdp, buffer, count, address); +} + +int mem_ap_sel_write_buf_u32(struct adiv5_dap *swjdp, uint8_t ap, + const uint8_t *buffer, int count, uint32_t address) +{ + dap_ap_select(swjdp, ap); + return mem_ap_write_buf_u32(swjdp, buffer, count, address); +} + + /*--------------------------------------------------------------------------*/ @@ -906,7 +980,6 @@ extern const struct dap_ops jtag_dp_ops; */ int ahbap_debugport_init(struct adiv5_dap *dap) { - uint32_t dummy; uint32_t ctrlstat; int cnt = 0; int retval; @@ -926,12 +999,12 @@ int ahbap_debugport_init(struct adiv5_dap *dap) * Should we probe, or take a hint from the caller? * Presumably we can ignore the possibility of multiple APs. */ - dap->apsel = !0; + dap->ap_current = !0; dap_ap_select(dap, 0); /* DP initialization */ - retval = dap_queue_dp_read(dap, DP_CTRL_STAT, &dummy); + retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL); if (retval != ERROR_OK) return retval; @@ -939,7 +1012,7 @@ int ahbap_debugport_init(struct adiv5_dap *dap) if (retval != ERROR_OK) return retval; - retval = dap_queue_dp_read(dap, DP_CTRL_STAT, &dummy); + retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL); if (retval != ERROR_OK) return retval; @@ -977,7 +1050,7 @@ int ahbap_debugport_init(struct adiv5_dap *dap) alive_sleep(10); } - retval = dap_queue_dp_read(dap, DP_CTRL_STAT, &dummy); + retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL); if (retval != ERROR_OK) return retval; /* With debug power on we can activate OVERRUN checking */ @@ -985,7 +1058,7 @@ int ahbap_debugport_init(struct adiv5_dap *dap) retval = dap_queue_dp_write(dap, DP_CTRL_STAT, dap->dp_ctrl_stat); if (retval != ERROR_OK) return retval; - retval = dap_queue_dp_read(dap, DP_CTRL_STAT, &dummy); + retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL); if (retval != ERROR_OK) return retval; @@ -1010,30 +1083,19 @@ is_dap_cid_ok(uint32_t cid3, uint32_t cid2, uint32_t cid1, uint32_t cid0) && ((cid1 & 0x0f) == 0) && cid0 == 0x0d; } -struct broken_cpu { - uint32_t dbgbase; - uint32_t apid; - uint32_t idcode; - uint32_t correct_dbgbase; - char *model; -} broken_cpus[] = { - { 0x80000000, 0x04770002, 0x1ba00477, 0x60000000, "imx51" }, -}; - -int dap_get_debugbase(struct adiv5_dap *dap, int apsel, +int dap_get_debugbase(struct adiv5_dap *dap, int ap, uint32_t *out_dbgbase, uint32_t *out_apid) { - uint32_t apselold; + uint32_t ap_old; int retval; - unsigned int i; - uint32_t dbgbase, apid, idcode; + uint32_t dbgbase, apid; /* AP address is in bits 31:24 of DP_SELECT */ - if (apsel >= 256) + if (ap >= 256) return ERROR_INVALID_ARGUMENTS; - apselold = dap->apsel; - dap_ap_select(dap, apsel); + ap_old = dap->ap_current; + dap_ap_select(dap, ap); retval = dap_queue_ap_read(dap, AP_REG_BASE, &dbgbase); if (retval != ERROR_OK) @@ -1048,29 +1110,14 @@ int dap_get_debugbase(struct adiv5_dap *dap, int apsel, /* Excavate the device ID code */ struct jtag_tap *tap = dap->jtag_info->tap; while (tap != NULL) { - if (tap->hasidcode) { - idcode = tap->idcode; + if (tap->hasidcode) break; - } tap = tap->next_tap; } if (tap == NULL || !tap->hasidcode) return ERROR_OK; - /* Some CPUs are messed up, so fixup if needed. */ - for (i = 0; i < sizeof(broken_cpus)/sizeof(struct broken_cpu); i++) - if (broken_cpus[i].dbgbase == dbgbase && - broken_cpus[i].apid == apid && - broken_cpus[i].idcode == idcode) { - LOG_WARNING("Found broken CPU (%s), trying to fixup " - "ROM Table location from 0x%08x to 0x%08x", - broken_cpus[i].model, dbgbase, - broken_cpus[i].correct_dbgbase); - dbgbase = broken_cpus[i].correct_dbgbase; - break; - } - - dap_ap_select(dap, apselold); + dap_ap_select(dap, ap_old); /* The asignment happens only here to prevent modification of these * values before they are certain. */ @@ -1080,18 +1127,18 @@ int dap_get_debugbase(struct adiv5_dap *dap, int apsel, return ERROR_OK; } -int dap_lookup_cs_component(struct adiv5_dap *dap, int apsel, +int dap_lookup_cs_component(struct adiv5_dap *dap, int ap, uint32_t dbgbase, uint8_t type, uint32_t *addr) { - uint32_t apselold; + uint32_t ap_old; uint32_t romentry, entry_offset = 0, component_base, devtype; int retval = ERROR_FAIL; - if (apsel >= 256) + if (ap >= 256) return ERROR_INVALID_ARGUMENTS; - apselold = dap->apsel; - dap_ap_select(dap, apsel); + ap_old = dap->ap_current; + dap_ap_select(dap, ap); do { @@ -1116,26 +1163,26 @@ int dap_lookup_cs_component(struct adiv5_dap *dap, int apsel, entry_offset += 4; } while (romentry > 0); - dap_ap_select(dap, apselold); + dap_ap_select(dap, ap_old); return retval; } static int dap_info_command(struct command_context *cmd_ctx, - struct adiv5_dap *dap, int apsel) + struct adiv5_dap *dap, int ap) { int retval; uint32_t dbgbase, apid; int romtable_present = 0; uint8_t mem_ap; - uint32_t apselold; + uint32_t ap_old; - retval = dap_get_debugbase(dap, apsel, &dbgbase, &apid); + retval = dap_get_debugbase(dap, ap, &dbgbase, &apid); if (retval != ERROR_OK) return retval; - apselold = dap->apsel; - dap_ap_select(dap, apsel); + ap_old = dap->ap_current; + dap_ap_select(dap, ap); /* Now we read ROM table ID registers, ref. ARM IHI 0029B sec */ mem_ap = ((apid&0x10000) && ((apid&0x0F) != 0)); @@ -1167,7 +1214,7 @@ static int dap_info_command(struct command_context *cmd_ctx, } else { - command_print(cmd_ctx, "No AP found at this apsel 0x%x", apsel); + command_print(cmd_ctx, "No AP found at this ap 0x%x", ap); } romtable_present = ((mem_ap) && (dbgbase != 0xFFFFFFFF)); @@ -1427,8 +1474,9 @@ static int dap_info_command(struct command_context *cmd_ctx, /* Part number interpretations are from Cortex * core specs, the CoreSight components TRM - * (ARM DDI 0314H), and ETM specs; also from - * chip observation (e.g. TI SDTI). + * (ARM DDI 0314H), CoreSight System Design + * Guide (ARM DGI 0012D) and ETM specs; also + * from chip observation (e.g. TI SDTI). */ part_num = (c_pid0 & 0xff); part_num |= (c_pid1 & 0x0f) << 8; @@ -1498,6 +1546,10 @@ static int dap_info_command(struct command_context *cmd_ctx, type = "Cortex-M3 ETM"; full = "(Embedded Trace)"; break; + case 0x930: + type = "Cortex-R4 ETM"; + full = "(Embedded Trace)"; + break; case 0xc08: type = "Cortex-A8 Debug"; full = "(Debug Unit)"; @@ -1524,7 +1576,7 @@ static int dap_info_command(struct command_context *cmd_ctx, { command_print(cmd_ctx, "\tNo ROM table present"); } - dap_ap_select(dap, apselold); + dap_ap_select(dap, ap_old); return ERROR_OK; } @@ -1556,10 +1608,9 @@ COMMAND_HANDLER(dap_baseaddr_command) struct arm *arm = target_to_arm(target); struct adiv5_dap *dap = arm->dap; - uint32_t apsel, apselsave, baseaddr; + uint32_t apsel, baseaddr; int retval; - apselsave = dap->apsel; switch (CMD_ARGC) { case 0: apsel = dap->apsel; @@ -1574,8 +1625,7 @@ COMMAND_HANDLER(dap_baseaddr_command) return ERROR_COMMAND_SYNTAX_ERROR; } - if (apselsave != apsel) - dap_ap_select(dap, apsel); + dap_ap_select(dap, apsel); /* NOTE: assumes we're talking to a MEM-AP, which * has a base address. There are other kinds of AP, @@ -1591,9 +1641,6 @@ COMMAND_HANDLER(dap_baseaddr_command) command_print(CMD_CTX, "0x%8.8" PRIx32, baseaddr); - if (apselsave != apsel) - dap_ap_select(dap, apselsave); - return retval; } @@ -1646,7 +1693,9 @@ COMMAND_HANDLER(dap_apsel_command) return ERROR_COMMAND_SYNTAX_ERROR; } + dap->apsel = apsel; dap_ap_select(dap, apsel); + retval = dap_queue_ap_read(dap, AP_REG_IDR, &apid); if (retval != ERROR_OK) return retval; @@ -1666,10 +1715,9 @@ COMMAND_HANDLER(dap_apid_command) struct arm *arm = target_to_arm(target); struct adiv5_dap *dap = arm->dap; - uint32_t apsel, apselsave, apid; + uint32_t apsel, apid; int retval; - apselsave = dap->apsel; switch (CMD_ARGC) { case 0: apsel = dap->apsel; @@ -1684,8 +1732,7 @@ COMMAND_HANDLER(dap_apid_command) return ERROR_COMMAND_SYNTAX_ERROR; } - if (apselsave != apsel) - dap_ap_select(dap, apsel); + dap_ap_select(dap, apsel); retval = dap_queue_ap_read(dap, AP_REG_IDR, &apid); if (retval != ERROR_OK) @@ -1695,8 +1742,6 @@ COMMAND_HANDLER(dap_apid_command) return retval; command_print(CMD_CTX, "0x%8.8" PRIx32, apid); - if (apselsave != apsel) - dap_ap_select(dap, apselsave); return retval; }