X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Ftarget%2Farm7tdmi.c;h=44e831fdf4a2d44cec10b72a00557426afc31d94;hb=f876d5e9c769a288faa7fd14b7bf373363542aab;hp=44d9b0a55c2539a717d3f6ae38f2ca7befd9049c;hpb=3e58929e6234616207ffcfc164cd502341820468;p=fw%2Fopenocd

diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index 44d9b0a55..44e831fdf 100644
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -28,6 +28,7 @@
 #endif
 
 #include "arm7tdmi.h"
+#include "target_type.h"
 
 
 #if 0
@@ -94,10 +95,10 @@ int arm7tdmi_examine_debug_reason(target_t *target)
 			&& (target->debug_reason != DBG_REASON_SINGLESTEP))
 	{
 		scan_field_t fields[2];
-		u8 databus[4];
-		u8 breakpoint;
+		uint8_t databus[4];
+		uint8_t breakpoint;
 
-		jtag_add_end_state(TAP_DRPAUSE);
+		jtag_set_end_state(TAP_DRPAUSE);
 
 		fields[0].tap = arm7_9->jtag_info.tap;
 		fields[0].num_bits = 1;
@@ -115,7 +116,7 @@ int arm7tdmi_examine_debug_reason(target_t *target)
 		}
 		arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL);
 
-		jtag_add_dr_scan(2, fields, TAP_DRPAUSE);
+		jtag_add_dr_scan(2, fields, jtag_set_end_state(TAP_DRPAUSE));
 		if((retval = jtag_execute_queue()) != ERROR_OK)
 		{
 			return retval;
@@ -126,7 +127,7 @@ int arm7tdmi_examine_debug_reason(target_t *target)
 		fields[1].in_value = NULL;
 		fields[1].out_value = databus;
 
-		jtag_add_dr_scan(2, fields, TAP_DRPAUSE);
+		jtag_add_dr_scan(2, fields, jtag_set_end_state(TAP_DRPAUSE));
 
 		if (breakpoint & 1)
 			target->debug_reason = DBG_REASON_WATCHPOINT;
@@ -146,9 +147,9 @@ static __inline int arm7tdmi_clock_out_inner(arm_jtag_t *jtag_info, u32 out, int
 			2,
 			arm7tdmi_num_bits,
 			values,
-			TAP_INVALID);
+			jtag_get_end_state());
 
-	jtag_add_runtest(0, TAP_INVALID);
+	jtag_add_runtest(0, jtag_get_end_state());
 
 	return ERROR_OK;
 }
@@ -156,7 +157,7 @@ static __inline int arm7tdmi_clock_out_inner(arm_jtag_t *jtag_info, u32 out, int
 /* put an instruction in the ARM7TDMI pipeline or write the data bus, and optionally read data */
 static __inline int arm7tdmi_clock_out(arm_jtag_t *jtag_info, u32 out, u32 *deprecated, int breakpoint)
 {
-	jtag_add_end_state(TAP_DRPAUSE);
+	jtag_set_end_state(TAP_DRPAUSE);
 	arm_jtag_scann(jtag_info, 0x1);
 	arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 
@@ -169,7 +170,7 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
 	int retval = ERROR_OK;
 	scan_field_t fields[2];
 
-	jtag_add_end_state(TAP_DRPAUSE);
+	jtag_set_end_state(TAP_DRPAUSE);
 	if((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
 	{
 		return retval;
@@ -184,13 +185,13 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
 	fields[1].tap = jtag_info->tap;
 	fields[1].num_bits = 32;
 	fields[1].out_value = NULL;
-	fields[1].in_value = (u8 *)in;
+	fields[1].in_value = (uint8_t *)in;
 
-	jtag_add_dr_scan(2, fields, TAP_INVALID);
+	jtag_add_dr_scan(2, fields, jtag_get_end_state());
 
-	jtag_add_callback(arm7flip32, (u8 *)in);
+	jtag_add_callback(arm7flip32, (uint8_t *)in);
 
-	jtag_add_runtest(0, TAP_INVALID);
+	jtag_add_runtest(0, jtag_get_end_state());
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
 {
@@ -213,7 +214,7 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
 	return ERROR_OK;
 }
 
-void arm_endianness(u8 *tmp, void *in, int size, int be, int flip)
+void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip)
 {
 	u32 readback=le_to_h_u32(tmp);
 	if (flip)
@@ -223,30 +224,30 @@ void arm_endianness(u8 *tmp, void *in, int size, int be, int flip)
 		case 4:
 			if (be)
 			{
-				h_u32_to_be(((u8*)in), readback);
+				h_u32_to_be(((uint8_t*)in), readback);
 			} else
 			{
-				 h_u32_to_le(((u8*)in), readback);
+				 h_u32_to_le(((uint8_t*)in), readback);
 			}
 			break;
 		case 2:
 			if (be)
 			{
-				h_u16_to_be(((u8*)in), readback & 0xffff);
+				h_u16_to_be(((uint8_t*)in), readback & 0xffff);
 			} else
 			{
-				h_u16_to_le(((u8*)in), readback & 0xffff);
+				h_u16_to_le(((uint8_t*)in), readback & 0xffff);
 			}
 			break;
 		case 1:
-			*((u8 *)in)= readback & 0xff;
+			*((uint8_t *)in)= readback & 0xff;
 			break;
 	}
 }
 
-static int arm7endianness(u8 *in, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t dummy)
+static int arm7endianness(uint8_t *in, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
 {
-	arm_endianness(in, in, (int)size, (int)be, 1);
+	arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 1);
 	return ERROR_OK;
 }
 
@@ -259,7 +260,7 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
 	int retval = ERROR_OK;
 	scan_field_t fields[2];
 
-	jtag_add_end_state(TAP_DRPAUSE);
+	jtag_set_end_state(TAP_DRPAUSE);
 	if((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
 	{
 		return retval;
@@ -274,13 +275,13 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
 	fields[1].tap = jtag_info->tap;
 	fields[1].num_bits = 32;
 	fields[1].out_value = NULL;
-	fields[1].in_value = (u8 *)in;
+	jtag_alloc_in_value32(&fields[1]);
 
-	jtag_add_dr_scan(2, fields, TAP_INVALID);
+	jtag_add_dr_scan(2, fields, jtag_get_end_state());
 
-	jtag_add_callback4(arm7endianness, in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)NULL);
+	jtag_add_callback4(arm7endianness, in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[1].in_value);
 
-	jtag_add_runtest(0, TAP_INVALID);
+	jtag_add_runtest(0, jtag_get_end_state());
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
 {
@@ -395,8 +396,8 @@ void arm7tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buf
 	arm_jtag_t *jtag_info = &arm7_9->jtag_info;
 	int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
 	u32 *buf_u32 = buffer;
-	u16 *buf_u16 = buffer;
-	u8 *buf_u8 = buffer;
+	uint16_t *buf_u16 = buffer;
+	uint8_t *buf_u8 = buffer;
 
 	/* STMIA r0-15, [r0] at debug speed
 	 * register values will start to appear on 4th DCLK
@@ -480,7 +481,7 @@ void arm7tdmi_write_xpsr(target_t *target, u32 xpsr, int spsr)
 	arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
 }
 
-void arm7tdmi_write_xpsr_im8(target_t *target, u8 xpsr_im, int rot, int spsr)
+void arm7tdmi_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr)
 {
 	/* get pointers to arch-specific information */
 	armv4_5_common_t *armv4_5 = target->arch_info;
@@ -718,7 +719,7 @@ int arm7tdmi_examine(struct target_s *target)
 	int retval;
 	armv4_5_common_t *armv4_5 = target->arch_info;
 	arm7_9_common_t *arm7_9 = armv4_5->arch_info;
-	if (!target->type->examined)
+	if (!target_was_examined(target))
 	{
 		/* get pointers to arch-specific information */
 		reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
@@ -735,7 +736,7 @@ int arm7tdmi_examine(struct target_s *target)
 			(*cache_p)->next = etm_build_reg_cache(target, jtag_info, arm7_9->etm_ctx);
 			arm7_9->etm_ctx->reg_cache = (*cache_p)->next;
 		}
-		target->type->examined = 1;
+		target_set_examined(target);
 	}
 	if ((retval=embeddedice_setup(target))!=ERROR_OK)
 		return retval;