X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Ftarget%2Farm11.h;h=9edadee1d911681f4f7b80c5305e0223b32c321f;hb=cb0de21d0cb6b899be30b6ce9c48d93f75a6c345;hp=f3f0644b08b90af0569ea94f078baf0cdd99e3d8;hpb=ea7a49cb9b46ccc27daf6c9b306290c7e905a9fc;p=fw%2Fopenocd

diff --git a/src/target/arm11.h b/src/target/arm11.h
index f3f0644b0..9edadee1d 100644
--- a/src/target/arm11.h
+++ b/src/target/arm11.h
@@ -23,8 +23,8 @@
 #ifndef ARM11_H
 #define ARM11_H
 
-#include <target/armv4_5.h>
-#include <target/arm_dpm.h>
+#include "arm.h"
+#include "arm_dpm.h"
 
 #define ARM11_TAP_DEFAULT			TAP_INVALID
 
@@ -53,9 +53,10 @@ struct arm11_common
 
 	/** Debug module state. */
 	struct arm_dpm dpm;
+	struct arm11_sc7_action *bpwp_actions;
+	unsigned bpwp_n;
 
 	size_t	brp;			/**< Number of Breakpoint Register Pairs from DIDR	*/
-	size_t	wrp;			/**< Number of Watchpoint Register Pairs from DIDR	*/
 	size_t	free_brps;		/**< Number of breakpoints allocated */
 
 	uint32_t dscr;			/**< Last retrieved DSCR value. */
@@ -68,6 +69,18 @@ struct arm11_common
 
 	bool	simulate_reset_on_next_halt;	/**< Perform cleanups of the ARM state on next halt */
 
+	/* Per-core configurable options.
+	 * NOTE that several of these boolean options should not exist
+	 * once the relevant code is known to work correctly.
+	 */
+	bool memwrite_burst;
+	bool memwrite_error_fatal;
+	bool step_irq_enable;
+	bool hardware_step;
+
+	/** Configured Vector Catch Register settings. */
+	uint32_t vcr;
+
 	struct arm_jtag jtag_info;
 };