X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fstmf0%2Fstm32f0.h;h=a2a58cec07e6add33ed4ce64a6a689be203480b8;hb=54dd2a6e3a05b940d9daebb3d73f6876c182b3e7;hp=1dbe6a121c983f5cd20c491efce002bda7c55f53;hpb=42072f591690b8258d957ab7a9b2f5d911676b39;p=fw%2Faltos

diff --git a/src/stmf0/stm32f0.h b/src/stmf0/stm32f0.h
index 1dbe6a12..a2a58cec 100644
--- a/src/stmf0/stm32f0.h
+++ b/src/stmf0/stm32f0.h
@@ -1890,6 +1890,7 @@ extern struct stm_usb stm_usb;
 #define STM_USB_EPR_CTR_RX	15
 #define  STM_USB_EPR_CTR_RX_WRITE_INVARIANT		1
 #define STM_USB_EPR_DTOG_RX	14
+#define STM_USB_EPR_SW_BUF_TX	14
 #define STM_USB_EPR_DTOG_RX_WRITE_INVARIANT		0
 #define STM_USB_EPR_STAT_RX	12
 #define  STM_USB_EPR_STAT_RX_DISABLED			0
@@ -1913,6 +1914,7 @@ extern struct stm_usb stm_usb;
 #define STM_USB_EPR_CTR_TX	7
 #define  STM_USB_CTR_TX_WRITE_INVARIANT			1
 #define STM_USB_EPR_DTOG_TX	6
+#define STM_USB_EPR_SW_BUF_RX	6
 #define  STM_USB_EPR_DTOG_TX_WRITE_INVARIANT		0
 #define STM_USB_EPR_STAT_TX	4
 #define  STM_USB_EPR_STAT_TX_DISABLED			0
@@ -1998,7 +2000,12 @@ union stm_usb_bdt {
 
 #define STM_USB_BDT_SIZE	8
 
+/* We'll use the first block of usb SRAM for the BDT */
 extern uint8_t stm_usb_sram[] __attribute__((aligned(4)));
+extern union stm_usb_bdt stm_usb_bdt[STM_USB_BDT_SIZE] __attribute__((aligned(4)));
+
+#define stm_usb_sram	((uint8_t *) 0x40006000)
+#define stm_usb_bdt	((union stm_usb_bdt *) 0x40006000)
 
 struct stm_exti {
 	vuint32_t	imr;
@@ -2137,4 +2144,49 @@ struct stm_usart {
 extern struct stm_usart	stm_usart1;
 extern struct stm_usart stm_usart2;
 
+#define isr_decl(name) \
+	void __attribute__ ((weak)) stm_ ## name ## _isr(void);
+
+isr_decl(nmi)
+isr_decl(hardfault)
+isr_decl(memmanage)
+isr_decl(busfault)
+isr_decl(usagefault)
+isr_decl(svc)
+isr_decl(debugmon)
+isr_decl(pendsv)
+isr_decl(systick)
+isr_decl(wwdg)
+isr_decl(pvd)
+isr_decl(rtc)
+isr_decl(flash)
+isr_decl(rcc_crs)
+isr_decl(exti0_1)
+isr_decl(exti2_3)
+isr_decl(exti4_15)
+isr_decl(tsc)
+isr_decl(dma_ch1)
+isr_decl(dma_ch2_3)
+isr_decl(dma_ch4_5_6)
+isr_decl(adc_comp)
+isr_decl(tim1_brk_up_trg_com)
+isr_decl(tim1_cc)
+isr_decl(tim2)
+isr_decl(tim3)
+isr_decl(tim6_dac)
+isr_decl(tim7)
+isr_decl(tim14)
+isr_decl(tim15)
+isr_decl(tim16)
+isr_decl(tim17)
+isr_decl(i2c1)
+isr_decl(i2c2)
+isr_decl(spi1)
+isr_decl(spi2)
+isr_decl(usart1)
+isr_decl(usart2)
+isr_decl(usart3_4_5_6_7_8)
+isr_decl(cec_can)
+isr_decl(usb)
+
 #endif /* _STM32F0_H_ */