X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fstmf0%2Fstm32f0.h;h=075fd6a90abae403ab4501aa7fa674fea374fe52;hb=a6baf04bae3fe6a6b3da2f456419732ffeb4d056;hp=e53a5dfde770b560d0978346f5c33474315647a1;hpb=9603d737e9ea58217ff2c2dd7c350c7a29fba980;p=fw%2Faltos

diff --git a/src/stmf0/stm32f0.h b/src/stmf0/stm32f0.h
index e53a5dfd..075fd6a9 100644
--- a/src/stmf0/stm32f0.h
+++ b/src/stmf0/stm32f0.h
@@ -282,8 +282,8 @@ struct stm_rcc {
 
 extern struct stm_rcc stm_rcc;
 
-/* Nominal high speed internal oscillator frequency is 16MHz */
-#define STM_HSI_FREQ		16000000
+/* Nominal high speed internal oscillator frequency is 8MHz */
+#define STM_HSI_FREQ		8000000
 
 #define STM_RCC_CR_PLLRDY	(25)
 #define STM_RCC_CR_PLLON	(24)
@@ -568,6 +568,8 @@ struct stm_pwr {
 
 extern struct stm_pwr stm_pwr;
 
+#define stm_pwr (*(struct stm_pwr *) 0x40007000)
+
 #define STM_PWR_CR_DBP		(8)
 
 #define STM_PWR_CR_PLS		(5)
@@ -585,7 +587,7 @@ extern struct stm_pwr stm_pwr;
 #define STM_PWR_CR_CSBF		(3)
 #define STM_PWR_CR_CWUF		(2)
 #define STM_PWR_CR_PDDS		(1)
-#define STM_PWR_CR_LPSDSR	(0)
+#define STM_PWR_CR_LPDS		(0)
 
 #define STM_PWR_CSR_EWUP3	(10)
 #define STM_PWR_CSR_EWUP2	(9)
@@ -746,6 +748,8 @@ struct stm_scb {
 
 extern struct stm_scb stm_scb;
 
+#define stm_scb (*(struct stm_scb *) 0xe000ed00)
+
 #define STM_SCB_AIRCR_VECTKEY		16
 #define  STM_SCB_AIRCR_VECTKEY_KEY		0x05fa
 #define STM_SCB_AIRCR_PRIGROUP		8
@@ -753,64 +757,9 @@ extern struct stm_scb stm_scb;
 #define STM_SCB_AIRCR_VECTCLRACTIVE	1
 #define STM_SCB_AIRCR_VECTRESET		0
 
-#define isr(name) void stm_ ## name ## _isr(void);
-
-isr(nmi)
-isr(hardfault)
-isr(memmanage)
-isr(busfault)
-isr(usagefault)
-isr(svc)
-isr(debugmon)
-isr(pendsv)
-isr(systick)
-isr(wwdg)
-isr(pvd)
-isr(tamper_stamp)
-isr(rtc_wkup)
-isr(flash)
-isr(rcc)
-isr(exti0)
-isr(exti1)
-isr(exti2)
-isr(exti3)
-isr(exti4)
-isr(dma1_channel1)
-isr(dma1_channel2)
-isr(dma1_channel3)
-isr(dma1_channel4)
-isr(dma1_channel5)
-isr(dma1_channel6)
-isr(dma1_channel7)
-isr(adc1)
-isr(usb_hp)
-isr(usb_lp)
-isr(dac)
-isr(comp)
-isr(exti9_5)
-isr(lcd)
-isr(tim9)
-isr(tim10)
-isr(tim11)
-isr(tim2)
-isr(tim3)
-isr(tim4)
-isr(i2c1_ev)
-isr(i2c1_er)
-isr(i2c2_ev)
-isr(i2c2_er)
-isr(spi1)
-isr(spi2)
-isr(usart1)
-isr(usart2)
-isr(usart3)
-isr(exti15_10)
-isr(rtc_alarm)
-isr(usb_fs_wkup)
-isr(tim6)
-isr(tim7)
-
-#undef isr
+#define STM_SCB_SCR_SEVONPEND		4
+#define STM_SCB_SCR_SLEEPDEEP		2
+#define STM_SCB_SCR_SLEEPONEXIT		1
 
 #define STM_ISR_WWDG_POS		0
 #define STM_ISR_PVD_VDDIO2_POS		1
@@ -1890,6 +1839,7 @@ extern struct stm_usb stm_usb;
 #define STM_USB_EPR_CTR_RX	15
 #define  STM_USB_EPR_CTR_RX_WRITE_INVARIANT		1
 #define STM_USB_EPR_DTOG_RX	14
+#define STM_USB_EPR_SW_BUF_TX	14
 #define STM_USB_EPR_DTOG_RX_WRITE_INVARIANT		0
 #define STM_USB_EPR_STAT_RX	12
 #define  STM_USB_EPR_STAT_RX_DISABLED			0
@@ -1906,11 +1856,14 @@ extern struct stm_usb stm_usb;
 #define  STM_USB_EPR_EP_TYPE_INTERRUPT			3
 #define  STM_USB_EPR_EP_TYPE_MASK			3
 #define STM_USB_EPR_EP_KIND	8
+#define  STM_USB_EPR_EP_KIND_SNGL_BUF			0	/* Bulk */
 #define  STM_USB_EPR_EP_KIND_DBL_BUF			1	/* Bulk */
+#define  STM_USB_EPR_EP_KIND_NO_STATUS_OUT		0	/* Control */
 #define  STM_USB_EPR_EP_KIND_STATUS_OUT			1	/* Control */
 #define STM_USB_EPR_CTR_TX	7
 #define  STM_USB_CTR_TX_WRITE_INVARIANT			1
 #define STM_USB_EPR_DTOG_TX	6
+#define STM_USB_EPR_SW_BUF_RX	6
 #define  STM_USB_EPR_DTOG_TX_WRITE_INVARIANT		0
 #define STM_USB_EPR_STAT_TX	4
 #define  STM_USB_EPR_STAT_TX_DISABLED			0
@@ -1996,7 +1949,12 @@ union stm_usb_bdt {
 
 #define STM_USB_BDT_SIZE	8
 
+/* We'll use the first block of usb SRAM for the BDT */
 extern uint8_t stm_usb_sram[] __attribute__((aligned(4)));
+extern union stm_usb_bdt stm_usb_bdt[STM_USB_BDT_SIZE] __attribute__((aligned(4)));
+
+#define stm_usb_sram	((uint8_t *) 0x40006000)
+#define stm_usb_bdt	((union stm_usb_bdt *) 0x40006000)
 
 struct stm_exti {
 	vuint32_t	imr;
@@ -2135,4 +2093,51 @@ struct stm_usart {
 extern struct stm_usart	stm_usart1;
 extern struct stm_usart stm_usart2;
 
+#define isr_decl(name) \
+	void stm_ ## name ## _isr(void)
+
+isr_decl(halt);
+isr_decl(ignore);
+isr_decl(nmi);
+isr_decl(hardfault);
+isr_decl(memmanage);
+isr_decl(busfault);
+isr_decl(usagefault);
+isr_decl(svc);
+isr_decl(debugmon);
+isr_decl(pendsv);
+isr_decl(systick);
+isr_decl(wwdg);
+isr_decl(pvd);
+isr_decl(rtc);
+isr_decl(flash);
+isr_decl(rcc_crs);
+isr_decl(exti0_1);
+isr_decl(exti2_3);
+isr_decl(exti4_15);
+isr_decl(tsc);
+isr_decl(dma_ch1);
+isr_decl(dma_ch2_3);
+isr_decl(dma_ch4_5_6);
+isr_decl(adc_comp);
+isr_decl(tim1_brk_up_trg_com);
+isr_decl(tim1_cc);
+isr_decl(tim2);
+isr_decl(tim3);
+isr_decl(tim6_dac);
+isr_decl(tim7);
+isr_decl(tim14);
+isr_decl(tim15);
+isr_decl(tim16);
+isr_decl(tim17);
+isr_decl(i2c1);
+isr_decl(i2c2);
+isr_decl(spi1);
+isr_decl(spi2);
+isr_decl(usart1);
+isr_decl(usart2);
+isr_decl(usart3_4_5_6_7_8);
+isr_decl(cec_can);
+isr_decl(usb);
+
 #endif /* _STM32F0_H_ */