X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fstmf0%2Fao_spi_stm.c;h=ae4417a274f4b3cc1f628bbdfedfbdd047e58f60;hb=4da8e047c4df06a0fec2c0cd47d26d5f1bef0e31;hp=0448ad8c375407167b1eeff93e04597a6dd07f75;hpb=1667cb8e8b702b05fc3ec39ee49029885df64a4a;p=fw%2Faltos diff --git a/src/stmf0/ao_spi_stm.c b/src/stmf0/ao_spi_stm.c index 0448ad8c..ae4417a2 100644 --- a/src/stmf0/ao_spi_stm.c +++ b/src/stmf0/ao_spi_stm.c @@ -25,7 +25,7 @@ struct ao_spi_stm_info { }; static uint8_t ao_spi_mutex[STM_NUM_SPI]; -static uint8_t ao_spi_index[STM_NUM_SPI]; +static uint8_t ao_spi_pin_config[STM_NUM_SPI]; static const struct ao_spi_stm_info ao_spi_stm_info[STM_NUM_SPI] = { { @@ -358,11 +358,11 @@ ao_spi_duplex(void *out, void *in, uint16_t len, uint8_t spi_index) } static void -ao_spi_disable_index(uint8_t spi_index) +ao_spi_disable_pin_config(uint8_t spi_pin_config) { - /* Disable current config + /* disable config */ - switch (spi_index) { + switch (spi_pin_config) { case AO_SPI_1_PA5_PA6_PA7: stm_gpio_set(&stm_gpioa, 5, 1); stm_moder_set(&stm_gpioa, 5, STM_MODER_OUTPUT); @@ -385,9 +385,11 @@ ao_spi_disable_index(uint8_t spi_index) } static void -ao_spi_enable_index(uint8_t spi_index) +ao_spi_enable_pin_config(uint8_t spi_pin_config) { - switch (spi_index) { + /* Disable current config + */ + switch (spi_pin_config) { case AO_SPI_1_PA5_PA6_PA7: stm_afr_set(&stm_gpioa, 5, STM_AFR_AF0); stm_afr_set(&stm_gpioa, 6, STM_AFR_AF0); @@ -409,22 +411,35 @@ ao_spi_enable_index(uint8_t spi_index) static void ao_spi_config(uint8_t spi_index, uint32_t speed) { + uint8_t spi_pin_config = AO_SPI_PIN_CONFIG(spi_index); uint8_t id = AO_SPI_INDEX(spi_index); struct stm_spi *stm_spi = ao_spi_stm_info[id].stm_spi; - if (spi_index != ao_spi_index[id]) { + switch (id) { +#if SPI_1_POWER_MANAGE + case 0: + stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_SPI1EN); + break; +#endif +#if SPI_2_POWER_MANAGE + case 1: + stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_SPI2EN); + break; +#endif + } + if (spi_pin_config != ao_spi_pin_config[id]) { /* Disable old config */ - ao_spi_disable_index(ao_spi_index[id]); + ao_spi_disable_pin_config(ao_spi_pin_config[id]); /* Enable new config */ - ao_spi_enable_index(spi_index); + ao_spi_enable_pin_config(spi_pin_config); /* Remember current config */ - ao_spi_index[id] = spi_index; + ao_spi_pin_config[id] = spi_pin_config; } stm_spi->cr2 = SPI_CR2; stm_spi->cr1 = ((0 << STM_SPI_CR1_BIDIMODE) | /* Three wire mode */ @@ -439,8 +454,8 @@ ao_spi_config(uint8_t spi_index, uint32_t speed) (1 << STM_SPI_CR1_SPE) | /* Enable SPI unit */ (speed << STM_SPI_CR1_BR) | /* baud rate to pclk/4 */ (1 << STM_SPI_CR1_MSTR) | - (0 << STM_SPI_CR1_CPOL) | /* Format 0 */ - (0 << STM_SPI_CR1_CPHA)); + (AO_SPI_CPOL(spi_index) << STM_SPI_CR1_CPOL) | /* Format */ + (AO_SPI_CPHA(spi_index) << STM_SPI_CR1_CPHA)); } uint8_t @@ -469,16 +484,38 @@ ao_spi_put(uint8_t spi_index) struct stm_spi *stm_spi = ao_spi_stm_info[id].stm_spi; stm_spi->cr1 = 0; + switch (id) { +#if SPI_1_POWER_MANAGE + case 0: + stm_rcc.apb2enr &= ~(1 << STM_RCC_APB2ENR_SPI1EN); + break; +#endif +#if SPI_2_POWER_MANAGE + case 1: + stm_rcc.apb1enr &= ~(1 << STM_RCC_APB1ENR_SPI2EN); + break; +#endif + } ao_mutex_put(&ao_spi_mutex[id]); } +void +ao_spi_put_pins(uint8_t spi_index) +{ + uint8_t id = AO_SPI_INDEX(spi_index); + + ao_spi_disable_pin_config(ao_spi_pin_config[id]); + ao_spi_pin_config[id] = AO_SPI_CONFIG_NONE; + ao_spi_put(spi_index); +} + static void ao_spi_channel_init(uint8_t spi_index) { uint8_t id = AO_SPI_INDEX(spi_index); struct stm_spi *stm_spi = ao_spi_stm_info[id].stm_spi; - ao_spi_disable_index(spi_index); + ao_spi_disable_pin_config(AO_SPI_PIN_CONFIG(spi_index)); stm_spi->cr1 = 0; stm_spi->cr2 = SPI_CR2_SYNC; @@ -536,12 +573,18 @@ void ao_spi_init(void) { #if HAS_SPI_1 +#ifndef SPI_1_PA5_PA6_PA7 +#error SPI_1_PA5_PA6_PA7 undefined +#endif # if SPI_1_PA5_PA6_PA7 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_IOPAEN); stm_ospeedr_set(&stm_gpioa, 5, SPI_1_OSPEEDR); stm_ospeedr_set(&stm_gpioa, 6, SPI_1_OSPEEDR); stm_ospeedr_set(&stm_gpioa, 7, SPI_1_OSPEEDR); # endif +# ifndef SPI_1_PB3_PB4_PB5 +# error SPI_1_PB3_PB4_PB5 undefined +# endif # if SPI_1_PB3_PB4_PB5 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_IOPBEN); stm_ospeedr_set(&stm_gpiob, 3, SPI_1_OSPEEDR); @@ -549,7 +592,7 @@ ao_spi_init(void) stm_ospeedr_set(&stm_gpiob, 5, SPI_1_OSPEEDR); # endif stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_SPI1EN); - ao_spi_index[0] = AO_SPI_CONFIG_NONE; + ao_spi_pin_config[0] = AO_SPI_CONFIG_NONE; ao_spi_channel_init(STM_SPI_INDEX(1)); #endif