X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fstmf0%2Fao_arch_funcs.h;h=d46899d575c409f149fd7e50767debb0422f24d1;hb=f1ea931ca808b120b5f378269aa9a6e38e90b8af;hp=01d51f90c17970b68140eaeef2b5342a7284de1d;hpb=f132a22995235f3002e4a2bb8771c9b5738efb30;p=fw%2Faltos diff --git a/src/stmf0/ao_arch_funcs.h b/src/stmf0/ao_arch_funcs.h index 01d51f90..d46899d5 100644 --- a/src/stmf0/ao_arch_funcs.h +++ b/src/stmf0/ao_arch_funcs.h @@ -26,20 +26,27 @@ /* PCLK is set to 48MHz (HCLK 48MHz, HPRE 1, PPRE 1) */ -#define AO_SPI_SPEED_24MHz STM_SPI_CR1_BR_PCLK_2 -#define AO_SPI_SPEED_12MHz STM_SPI_CR1_BR_PCLK_4 -#define AO_SPI_SPEED_6MHz STM_SPI_CR1_BR_PCLK_8 -#define AO_SPI_SPEED_3MHz STM_SPI_CR1_BR_PCLK_16 -#define AO_SPI_SPEED_1500kHz STM_SPI_CR1_BR_PCLK_32 -#define AO_SPI_SPEED_750kHz STM_SPI_CR1_BR_PCLK_64 -#define AO_SPI_SPEED_375kHz STM_SPI_CR1_BR_PCLK_128 -#define AO_SPI_SPEED_187500Hz STM_SPI_CR1_BR_PCLK_256 +#define _AO_SPI_SPEED_24MHz STM_SPI_CR1_BR_PCLK_2 +#define _AO_SPI_SPEED_12MHz STM_SPI_CR1_BR_PCLK_4 +#define _AO_SPI_SPEED_6MHz STM_SPI_CR1_BR_PCLK_8 +#define _AO_SPI_SPEED_3MHz STM_SPI_CR1_BR_PCLK_16 +#define _AO_SPI_SPEED_1500kHz STM_SPI_CR1_BR_PCLK_32 +#define _AO_SPI_SPEED_750kHz STM_SPI_CR1_BR_PCLK_64 +#define _AO_SPI_SPEED_375kHz STM_SPI_CR1_BR_PCLK_128 +#define _AO_SPI_SPEED_187500Hz STM_SPI_CR1_BR_PCLK_256 -#define AO_SPI_SPEED_FAST AO_SPI_SPEED_24MHz - -/* Companion bus wants something no faster than 200kHz */ - -#define AO_SPI_SPEED_200kHz AO_SPI_SPEED_187500Hz +static inline uint32_t +ao_spi_speed(uint32_t hz) +{ + if (hz >=24000000) return _AO_SPI_SPEED_24MHz; + if (hz >=12000000) return _AO_SPI_SPEED_12MHz; + if (hz >= 6000000) return _AO_SPI_SPEED_6MHz; + if (hz >= 3000000) return _AO_SPI_SPEED_3MHz; + if (hz >= 1500000) return _AO_SPI_SPEED_1500kHz; + if (hz >= 750000) return _AO_SPI_SPEED_750kHz; + if (hz >= 375000) return _AO_SPI_SPEED_375kHz; + return _AO_SPI_SPEED_187500Hz; +} #define AO_SPI_CONFIG_1 0x00 #define AO_SPI_1_CONFIG_PA5_PA6_PA7 AO_SPI_CONFIG_1 @@ -66,6 +73,18 @@ #define AO_SPI_INDEX(id) ((id) & AO_SPI_INDEX_MASK) #define AO_SPI_CONFIG(id) ((id) & AO_SPI_CONFIG_MASK) +#define AO_SPI_PIN_CONFIG(id) ((id) & (AO_SPI_INDEX_MASK | AO_SPI_CONFIG_MASK)) + +#define AO_SPI_CPOL_BIT 4 +#define AO_SPI_CPHA_BIT 5 +#define AO_SPI_CPOL(id) ((uint32_t) (((id) >> AO_SPI_CPOL_BIT) & 1)) +#define AO_SPI_CPHA(id) ((uint32_t) (((id) >> AO_SPI_CPHA_BIT) & 1)) + +#define AO_SPI_MAKE_MODE(pol,pha) (((pol) << AO_SPI_CPOL_BIT) | ((pha) << AO_SPI_CPHA_BIT)) +#define AO_SPI_MODE_0 AO_SPI_MAKE_MODE(0,0) +#define AO_SPI_MODE_1 AO_SPI_MAKE_MODE(0,1) +#define AO_SPI_MODE_2 AO_SPI_MAKE_MODE(1,0) +#define AO_SPI_MODE_3 AO_SPI_MAKE_MODE(1,1) uint8_t ao_spi_try_get(uint8_t spi_index, uint32_t speed, uint8_t task_id); @@ -141,8 +160,6 @@ ao_spi_recv(void *block, uint16_t len, uint8_t spi_index); void ao_spi_duplex(void *out, void *in, uint16_t len, uint8_t spi_index); -extern uint16_t ao_spi_speed[STM_NUM_SPI]; - void ao_spi_init(void); @@ -168,13 +185,15 @@ ao_spi_try_get_mask(struct stm_gpio *reg, uint16_t mask, uint8_t bus, uint32_t s ao_spi_put(bus); \ } while (0) -#define ao_spi_get_bit(reg,bit,pin,bus,speed) ao_spi_get_mask(reg,(1<stack + AO_STACK_SIZE); uint32_t a = (uint32_t) start; int i; @@ -405,7 +423,7 @@ ao_arch_init_stack(struct ao_task *task, void *start) /* PRIMASK with interrupts enabled */ ARM_PUSH32(sp, 0); - task->sp = sp; + task->sp32 = sp; } static inline void ao_arch_save_regs(void) { @@ -424,17 +442,14 @@ static inline void ao_arch_save_regs(void) { static inline void ao_arch_save_stack(void) { uint32_t *sp; asm("mov %0,sp" : "=&r" (sp) ); - ao_cur_task->sp = (sp); - if ((uint8_t *) sp < &ao_cur_task->stack[0]) + ao_cur_task->sp32 = (sp); + if (sp < &ao_cur_task->stack32[0]) ao_panic (AO_PANIC_STACK); } static inline void ao_arch_restore_stack(void) { - uint32_t sp; - sp = (uint32_t) ao_cur_task->sp; - /* Switch stacks */ - asm("mov sp, %0" : : "r" (sp) ); + asm("mov sp, %0" : : "r" (ao_cur_task->sp32) ); /* Restore PRIMASK */ asm("pop {r0}"); @@ -448,6 +463,34 @@ static inline void ao_arch_restore_stack(void) { asm("pop {r0-r7,pc}\n"); } +static inline void ao_sleep_mode(void) { + + /* + WFI (Wait for Interrupt) or WFE (Wait for Event) while: + – Set SLEEPDEEP in Cortex ® -M0 System Control register + – Set PDDS bit in Power Control register (PWR_CR) + – Clear WUF bit in Power Control/Status register (PWR_CSR) + */ + + ao_arch_block_interrupts(); + + /* Enable power interface clock */ + stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_PWREN); + ao_arch_nop(); + stm_scb.scr |= (1 << STM_SCB_SCR_SLEEPDEEP); + ao_arch_nop(); + stm_pwr.cr |= (1 << STM_PWR_CR_PDDS) | (1 << STM_PWR_CR_LPDS); + ao_arch_nop(); + stm_pwr.cr |= (1 << STM_PWR_CR_CWUF); + ao_arch_nop(); + ao_arch_nop(); + ao_arch_nop(); + ao_arch_nop(); + ao_arch_nop(); + asm("wfi"); + ao_arch_nop(); +} + #ifndef HAS_SAMPLE_PROFILE #define HAS_SAMPLE_PROFILE 0 #endif @@ -488,14 +531,22 @@ static inline void ao_arch_start_scheduler(void) { /* ao_usb_stm.c */ #if AO_USB_DIRECTIO -uint16_t * -ao_usb_alloc(void); +uint8_t +ao_usb_alloc(uint16_t *buffers[2]); -void -ao_usb_write(uint16_t *buffer, uint16_t len); +uint8_t +ao_usb_alloc2(uint16_t *buffers[2]); -void -ao_usb_write2(uint16_t *buffer, uint16_t len); +uint8_t +ao_usb_write(uint16_t len); + +uint8_t +ao_usb_write2(uint16_t len); #endif /* AO_USB_DIRECTIO */ +void start(void); + +void +ao_debug_out(char c); + #endif /* _AO_ARCH_FUNCS_H_ */