X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fstmf0%2Fao_adc_fast.c;h=fbf4ad2e88527e2d5e8d88c0d47924e52ff81d95;hb=c4b8aff07d5366cef2c7209729f6cd22fa67de0c;hp=be9b5986778d51ff95310a1e72f2f9884bd33eb0;hpb=8ca1f234586225caea1040bc229b63491dadc1cb;p=fw%2Faltos

diff --git a/src/stmf0/ao_adc_fast.c b/src/stmf0/ao_adc_fast.c
index be9b5986..fbf4ad2e 100644
--- a/src/stmf0/ao_adc_fast.c
+++ b/src/stmf0/ao_adc_fast.c
@@ -3,7 +3,8 @@
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -18,43 +19,53 @@
 #include <ao.h>
 #include <ao_adc_fast.h>
 
-uint16_t ao_adc_ring[AO_ADC_RING_SIZE];
+uint16_t ao_adc_ring[AO_ADC_RING_SIZE] __attribute__((aligned(4)));
 
-uint16_t ao_adc_ring_head, ao_adc_ring_tail;
-uint8_t ao_adc_running;
+/* Maximum number of samples fetched per _ao_adc_start call */
+#define AO_ADC_RING_CHUNK	(AO_ADC_RING_SIZE >> 1)
+
+uint16_t ao_adc_ring_head, ao_adc_ring_remain;
+uint16_t ao_adc_running;
 
 /*
  * Callback from DMA ISR
  *
- * Mark time in ring, shut down DMA engine
+ * Wakeup any waiting processes, mark the DMA as done, start the ADC
+ * if there's still lots of space in the ring
  */
 static void ao_adc_dma_done(int index)
 {
 	(void) index;
-	ao_adc_ring_head += AO_ADC_RING_CHUNK;
+	ao_adc_ring_head += ao_adc_running;
+	ao_adc_ring_remain += ao_adc_running;
 	if (ao_adc_ring_head == AO_ADC_RING_SIZE)
 		ao_adc_ring_head = 0;
 	ao_adc_running = 0;
 	ao_wakeup(&ao_adc_ring_head);
 	ao_dma_done_transfer(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC_1));
+	_ao_adc_start();
 }
 
 void
 _ao_adc_start(void)
 {
 	uint16_t	*buf;
+	uint16_t	count;
 
 	if (ao_adc_running)
 		return;
-	if (_ao_adc_space() < AO_ADC_RING_CHUNK)
+	count = _ao_adc_space();
+	if (count == 0)
 		return;
-	ao_adc_running = 1;
+	if (count > AO_ADC_RING_CHUNK)
+		count = AO_ADC_RING_CHUNK;
+	ao_adc_running = count;
 	buf = ao_adc_ring + ao_adc_ring_head;
 	stm_adc.isr = 0;
 	ao_dma_set_transfer(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC_1),
 			    &stm_adc.dr,
 			    buf,
-			    AO_ADC_RING_CHUNK,
+			    count,
 			    (0 << STM_DMA_CCR_MEM2MEM) |
 			    (STM_DMA_CCR_PL_HIGH << STM_DMA_CCR_PL) |
 			    (STM_DMA_CCR_MSIZE_16 << STM_DMA_CCR_MSIZE) |
@@ -62,7 +73,9 @@ _ao_adc_start(void)
 			    (1 << STM_DMA_CCR_MINC) |
 			    (0 << STM_DMA_CCR_PINC) |
 			    (0 << STM_DMA_CCR_CIRC) |
-			    (STM_DMA_CCR_DIR_PER_TO_MEM << STM_DMA_CCR_DIR));
+			    (STM_DMA_CCR_DIR_PER_TO_MEM << STM_DMA_CCR_DIR) |
+			    (1 << STM_DMA_CCR_TCIE));
+
 	ao_dma_set_isr(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC_1), ao_adc_dma_done);
 	ao_dma_start(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC_1));
 
@@ -73,7 +86,6 @@ void
 ao_adc_init(void)
 {
 	uint32_t	chselr;
-	int		i;
 
 	/* Reset ADC */
 	stm_rcc.apb2rstr |= (1 << STM_RCC_APB2RSTR_ADCRST);
@@ -140,7 +152,6 @@ ao_adc_init(void)
 #if AO_NUM_ADC > 8
 #error Need more ADC defines
 #endif
-	stm_adc.chselr = chselr;
 
 	/* Set the clock */
 	stm_adc.cfgr2 = STM_ADC_CFGR2_CKMODE_PCLK_2 << STM_ADC_CFGR2_CKMODE;
@@ -148,26 +159,29 @@ ao_adc_init(void)
 	/* Shortest sample time */
 	stm_adc.smpr = STM_ADC_SMPR_SMP_1_5 << STM_ADC_SMPR_SMP;
 
+	/* Turn off enable and start */
+	stm_adc.cr &= ~((1 << STM_ADC_CR_ADEN) | (1 << STM_ADC_CR_ADSTART));
+
 	/* Calibrate */
 	stm_adc.cr |= (1 << STM_ADC_CR_ADCAL);
-	for (i = 0; i < 0xf000; i++) {
-		if ((stm_adc.cr & (1 << STM_ADC_CR_ADCAL)) == 0)
-			break;
-	}
+	while ((stm_adc.cr & (1 << STM_ADC_CR_ADCAL)) != 0)
+		;
 
 	/* Enable */
 	stm_adc.cr |= (1 << STM_ADC_CR_ADEN);
 	while ((stm_adc.isr & (1 << STM_ADC_ISR_ADRDY)) == 0)
 		;
 
+	stm_adc.chselr = chselr;
+
 	stm_adc.cfgr1 = ((0 << STM_ADC_CFGR1_AWDCH) |
 			 (0 << STM_ADC_CFGR1_AWDEN) |
 			 (0 << STM_ADC_CFGR1_AWDSGL) |
 			 (0 << STM_ADC_CFGR1_DISCEN) |
 			 (0 << STM_ADC_CFGR1_AUTOOFF) |
-			 (1 << STM_ADC_CFGR1_WAIT) |
+			 (0 << STM_ADC_CFGR1_WAIT) |
 			 (1 << STM_ADC_CFGR1_CONT) |
-			 (0 << STM_ADC_CFGR1_OVRMOD) |
+			 (1 << STM_ADC_CFGR1_OVRMOD) |
 			 (STM_ADC_CFGR1_EXTEN_DISABLE << STM_ADC_CFGR1_EXTEN) |
 			 (0 << STM_ADC_CFGR1_ALIGN) |
 			 (STM_ADC_CFGR1_RES_12 << STM_ADC_CFGR1_RES) |
@@ -186,5 +200,4 @@ ao_adc_init(void)
 	stm_syscfg.cfgr1 &= ~(1 << STM_SYSCFG_CFGR1_ADC_DMA_RMP);
 
 	ao_dma_alloc(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC_1));
-	ao_dma_set_isr(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC_1), ao_adc_dma_done);
 }