X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fstm32f1%2Fao_arch_funcs.h;h=3a83f382faca4c3a75c73ee1cc2a6411877b0874;hb=4da8e047c4df06a0fec2c0cd47d26d5f1bef0e31;hp=ad9ab2a6620407096ccd6b0186a1927a1b198720;hpb=a080a564b9b54e6b3495d30703c45ba2850b1703;p=fw%2Faltos

diff --git a/src/stm32f1/ao_arch_funcs.h b/src/stm32f1/ao_arch_funcs.h
index ad9ab2a6..3a83f382 100644
--- a/src/stm32f1/ao_arch_funcs.h
+++ b/src/stm32f1/ao_arch_funcs.h
@@ -368,30 +368,6 @@ ao_dma_init(void);
 /* ao_spi_stm.c
  */
 
-/* PCLK is set to 16MHz (HCLK 32MHz, APB prescaler 2) */
-
-#define _AO_SPI_SPEED_8MHz	STM_SPI_CR1_BR_PCLK_2
-#define _AO_SPI_SPEED_4MHz	STM_SPI_CR1_BR_PCLK_4
-#define _AO_SPI_SPEED_2MHz	STM_SPI_CR1_BR_PCLK_8
-#define _AO_SPI_SPEED_1MHz	STM_SPI_CR1_BR_PCLK_16
-#define _AO_SPI_SPEED_500kHz	STM_SPI_CR1_BR_PCLK_32
-#define _AO_SPI_SPEED_250kHz	STM_SPI_CR1_BR_PCLK_64
-#define _AO_SPI_SPEED_125kHz	STM_SPI_CR1_BR_PCLK_128
-#define _AO_SPI_SPEED_62500Hz	STM_SPI_CR1_BR_PCLK_256
-
-static inline uint32_t
-ao_spi_speed(uint32_t hz)
-{
-	if (hz >= 8000000) return _AO_SPI_SPEED_8MHz;
-	if (hz >= 4000000) return _AO_SPI_SPEED_4MHz;
-	if (hz >= 2000000) return _AO_SPI_SPEED_2MHz;
-	if (hz >= 1000000) return _AO_SPI_SPEED_1MHz;
-	if (hz >=  500000) return _AO_SPI_SPEED_500kHz;
-	if (hz >=  250000) return _AO_SPI_SPEED_250kHz;
-	if (hz >=  125000) return _AO_SPI_SPEED_125kHz;
-	return _AO_SPI_SPEED_62500Hz;
-}
-
 #define AO_SPI_CPOL_BIT		4
 #define AO_SPI_CPHA_BIT		5
 
@@ -430,6 +406,22 @@ ao_spi_speed(uint32_t hz)
 #define AO_SPI_MODE_2		AO_SPI_MAKE_MODE(1,0)
 #define AO_SPI_MODE_3		AO_SPI_MAKE_MODE(1,1)
 
+/* SPI1 is on APB2, SPI2 is on APB1 */
+#define AO_SPI_FREQ(bus, div)	((AO_SPI_INDEX(bus) == 0 ? AO_APB2CLK : AO_APB1CLK) / (div))
+
+static inline uint32_t
+ao_spi_speed(int num, uint32_t hz)
+{
+	if (hz >= AO_SPI_FREQ(num, 2)) return STM_SPI_CR1_BR_PCLK_2;
+	if (hz >= AO_SPI_FREQ(num, 4)) return STM_SPI_CR1_BR_PCLK_4;
+	if (hz >= AO_SPI_FREQ(num, 8)) return STM_SPI_CR1_BR_PCLK_8;
+	if (hz >= AO_SPI_FREQ(num, 16)) return STM_SPI_CR1_BR_PCLK_16;
+	if (hz >= AO_SPI_FREQ(num, 32)) return STM_SPI_CR1_BR_PCLK_32;
+	if (hz >= AO_SPI_FREQ(num, 64)) return STM_SPI_CR1_BR_PCLK_64;
+	if (hz >= AO_SPI_FREQ(num, 128)) return STM_SPI_CR1_BR_PCLK_128;
+	return STM_SPI_CR1_BR_PCLK_256;
+}
+
 uint8_t
 ao_spi_try_get(uint8_t spi_index, uint32_t speed, uint8_t task_id);
 
@@ -510,6 +502,14 @@ ao_spi_duplex(const void *out, void *in, uint16_t len, uint8_t spi_index);
 void
 ao_spi_init(void);
 
+#define ao_spi_init_cs(port, mask) do {					\
+		uint8_t __bit__;					\
+		for (__bit__ = 0; __bit__ < 32; __bit__++) {		\
+			if (mask & (1 << __bit__))			\
+				ao_enable_output(port, __bit__, 1); \
+		}							\
+	} while (0)
+
 #define ao_spi_set_cs(reg,mask) ((reg)->bsrr = ((uint32_t) (mask)) << 16)
 #define ao_spi_clr_cs(reg,mask) ((reg)->bsrr = (mask))
 
@@ -535,4 +535,22 @@ ao_spi_try_get_mask(struct stm_gpio *reg, uint16_t mask, uint8_t bus, uint32_t s
 #define ao_spi_get_bit(reg,bit,bus,speed) ao_spi_get_mask(reg,1<<(bit),bus,speed)
 #define ao_spi_put_bit(reg,bit,bus) ao_spi_put_mask(reg,1<<(bit),bus)
 
+void
+ao_i2c_get(uint8_t i2c_index);
+
+uint8_t
+ao_i2c_start(uint8_t i2c_index, uint16_t address);
+
+void
+ao_i2c_put(uint8_t i2c_index);
+
+uint8_t
+ao_i2c_send(void *block, uint16_t len, uint8_t i2c_index, uint8_t stop);
+
+uint8_t
+ao_i2c_recv(void *block, uint16_t len, uint8_t i2c_index, uint8_t stop);
+
+void
+ao_i2c_init(void);
+
 #endif /* _AO_ARCH_FUNCS_H_ */