X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fstm%2Fstm32l.h;h=302f4d2451bf6fd762a544b257ab38cc0c93b7df;hb=677fcafd3816b6d8d86b2dc41b840d97b5ccbf07;hp=1d6360372e9a51c604bc059b88b8961f27ffc4fb;hpb=d029acad6a992be9b7b4498e70605f8a1e1a4ef6;p=fw%2Faltos diff --git a/src/stm/stm32l.h b/src/stm/stm32l.h index 1d636037..302f4d24 100644 --- a/src/stm/stm32l.h +++ b/src/stm/stm32l.h @@ -52,7 +52,7 @@ stm_moder_set(struct stm_gpio *gpio, int pin, vuint32_t value) { value << STM_MODER_SHIFT(pin)); } -static inline vuint32_t +static inline uint32_t stm_moder_get(struct stm_gpio *gpio, int pin) { return (gpio->moder >> STM_MODER_SHIFT(pin)) & STM_MODER_MASK; } @@ -69,7 +69,7 @@ stm_otyper_set(struct stm_gpio *gpio, int pin, vuint32_t value) { value << STM_OTYPER_SHIFT(pin)); } -static inline vuint32_t +static inline uint32_t stm_otyper_get(struct stm_gpio *gpio, int pin) { return (gpio->otyper >> STM_OTYPER_SHIFT(pin)) & STM_OTYPER_MASK; } @@ -88,7 +88,7 @@ stm_ospeedr_set(struct stm_gpio *gpio, int pin, vuint32_t value) { value << STM_OSPEEDR_SHIFT(pin)); } -static inline vuint32_t +static inline uint32_t stm_ospeedr_get(struct stm_gpio *gpio, int pin) { return (gpio->ospeedr >> STM_OSPEEDR_SHIFT(pin)) & STM_OSPEEDR_MASK; } @@ -171,6 +171,11 @@ stm_gpio_get(struct stm_gpio *gpio, int pin) { return (gpio->idr >> pin) & 1; } +static inline uint16_t +stm_gpio_get_all(struct stm_gpio *gpio) { + return gpio->idr; +} + extern struct stm_gpio stm_gpioa; extern struct stm_gpio stm_gpiob; extern struct stm_gpio stm_gpioc; @@ -435,6 +440,9 @@ extern struct stm_flash stm_flash; #define STM_FLASH_PEKEYR_PEKEY1 0x89ABCDEF #define STM_FLASH_PEKEYR_PEKEY2 0x02030405 +#define STM_FLASH_PRGKEYR_PRGKEY1 0x8C9DAEBF +#define STM_FLASH_PRGKEYR_PRGKEY2 0x13141516 + struct stm_rcc { vuint32_t cr; vuint32_t icscr; @@ -811,6 +819,24 @@ extern struct stm_lcd stm_lcd; #define STM_LCD_CLR_UDDC (3) #define STM_LCD_CLR_SOFC (1) +/* The SYSTICK starts at 0xe000e010 */ + +struct stm_systick { + vuint32_t csr; + vuint32_t rvr; + vuint32_t cvr; + vuint32_t calib; +}; + +extern struct stm_systick stm_systick; + +#define STM_SYSTICK_CSR_ENABLE 0 +#define STM_SYSTICK_CSR_TICKINT 1 +#define STM_SYSTICK_CSR_CLKSOURCE 2 +#define STM_SYSTICK_CSR_CLKSOURCE_HCLK_8 0 +#define STM_SYSTICK_CSR_CLKSOURCE_HCLK 1 +#define STM_SYSTICK_CSR_COUNTFLAG 16 + /* The NVIC starts at 0xe000e100, so add that to the offsets to find the absolute address */ struct stm_nvic { @@ -1713,7 +1739,7 @@ extern struct stm_tim234 stm_tim2, stm_tim3, stm_tim4; #define STM_TIM234_CCMR1_CC1S_INPUT_TRC 3 #define STM_TIM234_CCMR1_CC1S_MASK 3 -#define STM_TIM234_CCMR2_OC2CE 15 +#define STM_TIM234_CCMR2_OC4CE 15 #define STM_TIM234_CCMR2_OC4M 12 #define STM_TIM234_CCMR2_OC4M_FROZEN 0 #define STM_TIM234_CCMR2_OC4M_SET_HIGH_ON_MATCH 1