X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fstm%2Fstm32l.h;h=01afedc625bc0b66fe4c07798237903019e5f2a9;hb=7348cc4736c9a94f9ad299edd78199b544d0e95a;hp=5c0748a6891dd3432b34329422bb745f42e41fef;hpb=091582c446319fe4a79154153ece5372b2faec83;p=fw%2Faltos

diff --git a/src/stm/stm32l.h b/src/stm/stm32l.h
index 5c0748a6..01afedc6 100644
--- a/src/stm/stm32l.h
+++ b/src/stm/stm32l.h
@@ -52,7 +52,7 @@ stm_moder_set(struct stm_gpio *gpio, int pin, vuint32_t value) {
 		       value << STM_MODER_SHIFT(pin));
 }
 	
-static inline vuint32_t
+static inline uint32_t
 stm_moder_get(struct stm_gpio *gpio, int pin) {
 	return (gpio->moder >> STM_MODER_SHIFT(pin)) & STM_MODER_MASK;
 }
@@ -69,7 +69,7 @@ stm_otyper_set(struct stm_gpio *gpio, int pin, vuint32_t value) {
 			value << STM_OTYPER_SHIFT(pin));
 }
 	
-static inline vuint32_t
+static inline uint32_t
 stm_otyper_get(struct stm_gpio *gpio, int pin) {
 	return (gpio->otyper >> STM_OTYPER_SHIFT(pin)) & STM_OTYPER_MASK;
 }
@@ -88,7 +88,7 @@ stm_ospeedr_set(struct stm_gpio *gpio, int pin, vuint32_t value) {
 		       value << STM_OSPEEDR_SHIFT(pin));
 }
 	
-static inline vuint32_t
+static inline uint32_t
 stm_ospeedr_get(struct stm_gpio *gpio, int pin) {
 	return (gpio->ospeedr >> STM_OSPEEDR_SHIFT(pin)) & STM_OSPEEDR_MASK;
 }
@@ -171,12 +171,32 @@ stm_gpio_get(struct stm_gpio *gpio, int pin) {
 	return (gpio->idr >> pin) & 1;
 }
 
-extern struct stm_gpio stm_gpioa;
-extern struct stm_gpio stm_gpiob;
-extern struct stm_gpio stm_gpioc;
-extern struct stm_gpio stm_gpiod;
-extern struct stm_gpio stm_gpioe;
-extern struct stm_gpio stm_gpioh;
+static inline uint16_t
+stm_gpio_get_all(struct stm_gpio *gpio) {
+	return gpio->idr;
+}
+
+/*
+ * We can't define these in registers.ld or our fancy
+ * ao_enable_gpio macro will expand into a huge pile of code
+ * as the compiler won't do correct constant folding and
+ * dead-code elimination
+
+ extern struct stm_gpio stm_gpioa;
+ extern struct stm_gpio stm_gpiob;
+ extern struct stm_gpio stm_gpioc;
+ extern struct stm_gpio stm_gpiod;
+ extern struct stm_gpio stm_gpioe;
+ extern struct stm_gpio stm_gpioh;
+
+*/
+
+#define stm_gpioh  (*((struct stm_gpio *) 0x40021400))
+#define stm_gpioe  (*((struct stm_gpio *) 0x40021000))
+#define stm_gpiod  (*((struct stm_gpio *) 0x40020c00))
+#define stm_gpioc  (*((struct stm_gpio *) 0x40020800))
+#define stm_gpiob  (*((struct stm_gpio *) 0x40020400))
+#define stm_gpioa  (*((struct stm_gpio *) 0x40020000))
 
 struct stm_usart {
 	vuint32_t	sr;	/* status register */
@@ -435,6 +455,9 @@ extern struct stm_flash	stm_flash;
 #define STM_FLASH_PEKEYR_PEKEY1	0x89ABCDEF
 #define STM_FLASH_PEKEYR_PEKEY2 0x02030405
 
+#define STM_FLASH_PRGKEYR_PRGKEY1 0x8C9DAEBF
+#define STM_FLASH_PRGKEYR_PRGKEY2 0x13141516
+
 struct stm_rcc {
 	vuint32_t	cr;
 	vuint32_t	icscr;
@@ -1484,6 +1507,36 @@ extern struct stm_temp_cal	stm_temp_cal;
 #define stm_temp_cal_cold	25
 #define stm_temp_cal_hot	110
 
+struct stm_dbg_mcu {
+	uint32_t	idcode;
+};
+
+extern struct stm_dbg_mcu	stm_dbg_mcu;
+
+static inline uint16_t
+stm_dev_id(void) {
+	return stm_dbg_mcu.idcode & 0xfff;
+}
+
+struct stm_flash_size {
+	uint16_t	f_size;
+};
+
+extern struct stm_flash_size	stm_flash_size_medium;
+extern struct stm_flash_size	stm_flash_size_large;
+
+/* Returns flash size in bytes */
+extern uint32_t
+stm_flash_size(void);
+
+struct stm_device_id {
+	uint32_t	u_id0;
+	uint32_t	u_id1;
+	uint32_t	u_id2;
+};
+
+extern struct stm_device_id	stm_device_id;
+
 #define STM_NUM_I2C	2
 
 #define STM_I2C_INDEX(channel)	((channel) - 1)
@@ -1722,7 +1775,7 @@ extern struct stm_tim234 stm_tim2, stm_tim3, stm_tim4;
 #define  STM_TIM234_CCMR1_OC1M_PWM_MODE_1		6
 #define  STM_TIM234_CCMR1_OC1M_PWM_MODE_2		7
 #define  STM_TIM234_CCMR1_OC1M_MASK			7
-#define STM_TIM234_CCMR1_OC1PE	11
+#define STM_TIM234_CCMR1_OC1PE	3
 #define STM_TIM234_CCMR1_OC1FE	2
 #define STM_TIM234_CCMR1_CC1S	0
 #define  STM_TIM234_CCMR1_CC1S_OUTPUT			0
@@ -1731,7 +1784,7 @@ extern struct stm_tim234 stm_tim2, stm_tim3, stm_tim4;
 #define  STM_TIM234_CCMR1_CC1S_INPUT_TRC		3
 #define  STM_TIM234_CCMR1_CC1S_MASK			3
 
-#define STM_TIM234_CCMR2_OC2CE	15
+#define STM_TIM234_CCMR2_OC4CE	15
 #define STM_TIM234_CCMR2_OC4M	12
 #define  STM_TIM234_CCMR2_OC4M_FROZEN			0
 #define  STM_TIM234_CCMR2_OC4M_SET_HIGH_ON_MATCH	1
@@ -1762,7 +1815,7 @@ extern struct stm_tim234 stm_tim2, stm_tim3, stm_tim4;
 #define  STM_TIM234_CCMR2_OC3M_PWM_MODE_1		6
 #define  STM_TIM234_CCMR2_OC3M_PWM_MODE_2		7
 #define  STM_TIM234_CCMR2_OC3M_MASK			7
-#define STM_TIM234_CCMR2_OC3PE	11
+#define STM_TIM234_CCMR2_OC3PE	3
 #define STM_TIM234_CCMR2_OC3FE	2
 #define STM_TIM234_CCMR2_CC3S	0
 #define  STM_TIM234_CCMR2_CC3S_OUTPUT			0