X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fstm%2Fao_i2c_stm.c;h=e634377cc996545a3118375f3705a81b40eb1abd;hb=5b3a457f232e39977a437fc52256fc15c612b377;hp=ae111ecb367d17002d8f1c859d8a7bb99fa5d1da;hpb=1085ec5d57e0ed5d132f2bbdac1a0b6a32c0ab4a;p=fw%2Faltos

diff --git a/src/stm/ao_i2c_stm.c b/src/stm/ao_i2c_stm.c
index ae111ecb..e634377c 100644
--- a/src/stm/ao_i2c_stm.c
+++ b/src/stm/ao_i2c_stm.c
@@ -75,6 +75,9 @@ uint8_t 	ao_i2c_mutex[STM_NUM_I2C];
 #if AO_PCLK1 == 16000000
 # define AO_STM_I2C_CR2_FREQ	STM_I2C_CR2_FREQ_16_MHZ
 #endif
+#if AO_PCLK1 == 24000000
+# define AO_STM_I2C_CR2_FREQ	STM_I2C_CR2_FREQ_24_MHZ
+#endif
 #if AO_PCLK1 == 32000000
 # define AO_STM_I2C_CR2_FREQ	STM_I2C_CR2_FREQ_32_MHZ
 #endif
@@ -129,17 +132,17 @@ ao_i2c_ev_isr(uint8_t index)
 	if (sr1 & (1 << STM_I2C_SR1_SB))
 		stm_i2c->dr = ao_i2c_addr[index];
 	if (sr1 & (1 << STM_I2C_SR1_ADDR)) {
-		stm_i2c->cr2 &= ~(1 << STM_I2C_CR2_ITEVTEN);
+		stm_i2c->cr2 &= ~(1UL << STM_I2C_CR2_ITEVTEN);
 		ao_i2c_state[index] = I2C_RUNNING;
 		ao_wakeup(&ao_i2c_state[index]);
 	}
 	if (sr1 & (1 << STM_I2C_SR1_BTF)) {
-		stm_i2c->cr2 &= ~(1 << STM_I2C_CR2_ITEVTEN);
+		stm_i2c->cr2 &= ~(1UL << STM_I2C_CR2_ITEVTEN);
 		ao_wakeup(&ao_i2c_state[index]);
 	}
 	if (sr1 & (1 << STM_I2C_SR1_RXNE)) {
-		if (ao_i2c_recv_len[index]) {			
-			*(ao_i2c_recv_data[index]++) = stm_i2c->dr;
+		if (ao_i2c_recv_len[index]) {
+			*(ao_i2c_recv_data[index]++) = (uint8_t) stm_i2c->dr;
 			if (!--ao_i2c_recv_len[index])
 				ao_wakeup(&ao_i2c_recv_len[index]);
 		}
@@ -158,7 +161,7 @@ ao_i2c_er_isr(uint8_t index)
 	sr1 = stm_i2c->sr1;
 	if (sr1 & (1 << STM_I2C_SR1_AF)) {
 		ao_i2c_state[index] = I2C_ERROR;
-		stm_i2c->sr1 = sr1 & ~(1 << STM_I2C_SR1_AF);
+		stm_i2c->sr1 = sr1 & ~(1UL << STM_I2C_SR1_AF);
 		ao_wakeup(&ao_i2c_state[index]);
 	}
 }
@@ -255,7 +258,7 @@ ao_i2c_send(void *block, uint16_t len, uint8_t index, uint8_t stop)
 			    (0 << STM_DMA_CCR_PINC) |
 			    (0 << STM_DMA_CCR_CIRC) |
 			    (STM_DMA_CCR_DIR_MEM_TO_PER << STM_DMA_CCR_DIR));
-			   
+
 	ao_dma_start(tx_dma_index);
 	ao_arch_block_interrupts();
 	while (!ao_dma_done[tx_dma_index])
@@ -272,10 +275,10 @@ ao_i2c_send(void *block, uint16_t len, uint8_t index, uint8_t stop)
 		stm_i2c->cr1 = AO_STM_I2C_CR1 | (1 << STM_I2C_CR1_STOP);
 		ao_i2c_wait_stop(index);
 	}
-	return TRUE;
+	return true;
 }
 
-void
+static void
 ao_i2c_recv_dma_isr(int index)
 {
 	int		i;
@@ -297,10 +300,10 @@ uint8_t
 ao_i2c_recv(void *block, uint16_t len, uint8_t index, uint8_t stop)
 {
 	struct stm_i2c	*stm_i2c = ao_i2c_stm_info[index].stm_i2c;
-	uint8_t		ret = TRUE;
+	uint8_t		ret = true;
 
 	if (len == 0)
-		return TRUE;
+		return true;
 	if (len == 1) {
 		ao_i2c_recv_data[index] = block;
 		ao_i2c_recv_len[index] = 1;
@@ -331,13 +334,24 @@ ao_i2c_recv(void *block, uint16_t len, uint8_t index, uint8_t stop)
 				    block,
 				    len,
 				    (0 << STM_DMA_CCR_MEM2MEM) |
-				    (STM_DMA_CCR_PL_MEDIUM << STM_DMA_CCR_PL) |
+				    (STM_DMA_CCR_PL_HIGH << STM_DMA_CCR_PL) |
 				    (STM_DMA_CCR_MSIZE_8 << STM_DMA_CCR_MSIZE) |
 				    (STM_DMA_CCR_PSIZE_8 << STM_DMA_CCR_PSIZE) |
 				    (1 << STM_DMA_CCR_MINC) |
 				    (0 << STM_DMA_CCR_PINC) |
 				    (0 << STM_DMA_CCR_CIRC) |
 				    (STM_DMA_CCR_DIR_PER_TO_MEM << STM_DMA_CCR_DIR));
+
+		/* XXX ao_i2c_recv_dma_isr hasn't ever been used, so it
+		 * doesn't appear to be necessary. Testing with a device
+		 * that uses i2c would really be useful here to discover
+		 * whether this function is necessary or not.
+		 */
+#if 0
+		ao_dma_set_isr(rx_dma_index, ao_i2c_recv_dma_isr);
+#else
+		(void) ao_i2c_recv_dma_isr;
+#endif
 		stm_i2c->cr1 = AO_STM_I2C_CR1 | (1 << STM_I2C_CR1_ACK);
 		stm_i2c->cr2 = AO_STM_I2C_CR2 |
 			(1 << STM_I2C_CR2_DMAEN) | (1 << STM_I2C_CR2_LAST);
@@ -360,7 +374,7 @@ ao_i2c_recv(void *block, uint16_t len, uint8_t index, uint8_t stop)
 	return ret;
 }
 
-void
+static void
 ao_i2c_channel_init(uint8_t index)
 {
 	struct stm_i2c	*stm_i2c = ao_i2c_stm_info[index].stm_i2c;