X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fstm%2Fao_arch_funcs.h;h=f1d17ed152a5a8e0aea983e3446dcc1018634b72;hb=eee2ca7fa7fd77be8ca5806cad7e250053465048;hp=1e78cabc5fbadb9a9519aaf9a63f1321a7a6d7a0;hpb=a453e2245996854e722346789f972fd088e33ba8;p=fw%2Faltos

diff --git a/src/stm/ao_arch_funcs.h b/src/stm/ao_arch_funcs.h
index 1e78cabc..f1d17ed1 100644
--- a/src/stm/ao_arch_funcs.h
+++ b/src/stm/ao_arch_funcs.h
@@ -64,6 +64,9 @@
 #define AO_SPI_INDEX(id)	((id) & AO_SPI_INDEX_MASK)
 #define AO_SPI_CONFIG(id)	((id) & AO_SPI_CONFIG_MASK)
 
+uint8_t
+ao_spi_try_get(uint8_t spi_index, uint32_t speed, uint8_t task_id);
+
 void
 ao_spi_get(uint8_t spi_index, uint32_t speed);
 
@@ -71,11 +74,42 @@ void
 ao_spi_put(uint8_t spi_index);
 
 void
-ao_spi_send(void *block, uint16_t len, uint8_t spi_index);
+ao_spi_send(const void *block, uint16_t len, uint8_t spi_index);
 
 void
 ao_spi_send_fixed(uint8_t value, uint16_t len, uint8_t spi_index);
 
+void
+ao_spi_send_sync(void *block, uint16_t len, uint8_t spi_index);
+
+static inline void
+ao_spi_send_byte(uint8_t byte, uint8_t spi_index)
+{
+	struct stm_spi	*stm_spi;
+
+	switch (AO_SPI_INDEX(spi_index)) {
+	case 0:
+		stm_spi = &stm_spi1;
+		break;
+	case 1:
+		stm_spi = &stm_spi2;
+		break;
+	}
+
+	stm_spi->cr2 = ((0 << STM_SPI_CR2_TXEIE) |
+			(0 << STM_SPI_CR2_RXNEIE) |
+			(0 << STM_SPI_CR2_ERRIE) |
+			(0 << STM_SPI_CR2_SSOE) |
+			(0 << STM_SPI_CR2_TXDMAEN) |
+			(0 << STM_SPI_CR2_RXDMAEN));
+
+	/* Clear RXNE */
+	(void) stm_spi->dr;
+
+	while (!(stm_spi->sr & (1 << STM_SPI_SR_TXE)));
+	stm_spi->dr = byte;
+}
+
 void
 ao_spi_recv(void *block, uint16_t len, uint8_t spi_index);
 
@@ -87,13 +121,25 @@ extern uint16_t	ao_spi_speed[STM_NUM_SPI];
 void
 ao_spi_init(void);
 
+#define ao_spi_set_cs(reg,mask) ((reg)->bsrr = ((uint32_t) (mask)) << 16)
+#define ao_spi_clr_cs(reg,mask) ((reg)->bsrr = (mask))
+
 #define ao_spi_get_mask(reg,mask,bus, speed) do {		\
 		ao_spi_get(bus, speed);				\
-		(reg)->bsrr = ((uint32_t) mask) << 16;	\
+		ao_spi_set_cs(reg,mask);			\
 	} while (0)
 
+static inline uint8_t
+ao_spi_try_get_mask(struct stm_gpio *reg, uint16_t mask, uint8_t bus, uint32_t speed, uint8_t task_id)
+{
+	if (!ao_spi_try_get(bus, speed, task_id))
+		return 0;
+	ao_spi_set_cs(reg, mask);
+	return 1;
+}
+
 #define ao_spi_put_mask(reg,mask,bus) do {	\
-		(reg)->bsrr = mask;		\
+		ao_spi_clr_cs(reg,mask);	\
 		ao_spi_put(bus);		\
 	} while (0)
 
@@ -131,6 +177,11 @@ ao_spi_init(void);
 
 #define ao_gpio_get(port, bit, pin) stm_gpio_get(port, bit)
 
+#define ao_gpio_set_bits(port, bits) stm_gpio_set_bits(port, bits)
+
+#define ao_gpio_clr_bits(port, bits) stm_gpio_clr_bits(port, bits);
+
+
 #define ao_enable_output(port,bit,pin,v) do {			\
 		ao_enable_port(port);				\
 		ao_gpio_set(port, bit, pin, v);			\
@@ -249,6 +300,8 @@ extern struct ao_stm_usart	ao_stm_usart3;
 
 #define ARM_PUSH32(stack, val)	(*(--(stack)) = (val))
 
+typedef uint32_t	ao_arch_irq_t;
+
 static inline uint32_t
 ao_arch_irqsave(void) {
 	uint32_t	primask;
@@ -315,6 +368,13 @@ static inline void ao_arch_save_stack(void) {
 
 static inline void ao_arch_restore_stack(void) {
 	uint32_t	sp;
+	uint32_t	control;
+
+	asm("mrs %0,control" : "=&r" (control));
+	control |= (1 << 1);
+	asm("msr control,%0" : : "r" (control));
+	asm("isb");
+
 	sp = (uint32_t) ao_cur_task->sp;
 
 	/* Switch stacks */
@@ -326,7 +386,7 @@ static inline void ao_arch_restore_stack(void) {
 
 	/* Restore APSR */
 	asm("pop {r0}");
-	asm("msr apsr,r0");
+	asm("msr apsr_nczvq,r0");
 
 	/* Restore general registers */
 	asm("pop {r0-r12,lr}\n");
@@ -335,6 +395,27 @@ static inline void ao_arch_restore_stack(void) {
 	asm("bx lr");
 }
 
+#ifndef HAS_SAMPLE_PROFILE
+#define HAS_SAMPLE_PROFILE 0
+#endif
+
+#if DEBUG
+#define HAS_ARCH_VALIDATE_CUR_STACK	1
+
+static inline void
+ao_validate_cur_stack(void)
+{
+	uint8_t		*psp;
+
+	asm("mrs %0,psp" : "=&r" (psp));
+	if (ao_cur_task &&
+	    psp <= ao_cur_task->stack &&
+	    psp >= ao_cur_task->stack - 256)
+		ao_panic(AO_PANIC_STACK);
+}
+#endif
+
+#if !HAS_SAMPLE_PROFILE
 #define HAS_ARCH_START_SCHEDULER	1
 
 static inline void ao_arch_start_scheduler(void) {
@@ -346,22 +427,32 @@ static inline void ao_arch_start_scheduler(void) {
 	asm("mrs %0,control" : "=&r" (control));
 	control |= (1 << 1);
 	asm("msr control,%0" : : "r" (control));
+	asm("isb");
 }
+#endif
+
+static inline void ao_arch_isr_stack(void) {
+	uint32_t	control;
 
-#define ao_arch_isr_stack()
+	asm("mrs %0,control" : "=&r" (control));
+	control &= ~(1 << 1);
+	asm("msr control,%0" : : "r" (control));
+	asm("isb");
+}
 
 #endif
 
-#define ao_arch_wait_interrupt() do {			\
-		asm(".global ao_idle_loc\n\twfi\nao_idle_loc:");	\
-		ao_arch_release_interrupts();				\
-		ao_arch_block_interrupts();				\
+#define ao_arch_wait_interrupt() do {				\
+		asm("\twfi\n");					\
+		ao_arch_release_interrupts();			\
+		asm(".global ao_idle_loc\nao_idle_loc:");	\
+		ao_arch_block_interrupts();			\
 	} while (0)
 
-#define ao_arch_critical(b) do {				\
-		ao_arch_block_interrupts();			\
-		do { b } while (0);				\
-		ao_arch_release_interrupts();			\
+#define ao_arch_critical(b) do {			\
+		uint32_t __mask = ao_arch_irqsave();	\
+		do { b } while (0);			\
+		ao_arch_irqrestore(__mask);		\
 	} while (0)
 
 #endif /* _AO_ARCH_FUNCS_H_ */