X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fstm%2Fao_arch_funcs.h;h=8393898de33d47b0272574eb3e8e591048ad41a9;hb=2e60cd22f6789c94343e6432822cedab028dc1ba;hp=02b344b11078edfc1eb8dd3283fe23c6022a4df9;hpb=6a9546413d6a236c010e806b50506d870961d074;p=fw%2Faltos

diff --git a/src/stm/ao_arch_funcs.h b/src/stm/ao_arch_funcs.h
index 02b344b1..8393898d 100644
--- a/src/stm/ao_arch_funcs.h
+++ b/src/stm/ao_arch_funcs.h
@@ -80,7 +80,35 @@ void
 ao_spi_send_fixed(uint8_t value, uint16_t len, uint8_t spi_index);
 
 void
-ao_spi_send_sync(void *block, uint16_t len, uint8_t spi_index);
+ao_spi_send_sync(const void *block, uint16_t len, uint8_t spi_index);
+
+static inline void
+ao_spi_send_byte(uint8_t byte, uint8_t spi_index)
+{
+	struct stm_spi	*stm_spi;
+
+	switch (AO_SPI_INDEX(spi_index)) {
+	case 0:
+		stm_spi = &stm_spi1;
+		break;
+	case 1:
+		stm_spi = &stm_spi2;
+		break;
+	}
+
+	stm_spi->cr2 = ((0 << STM_SPI_CR2_TXEIE) |
+			(0 << STM_SPI_CR2_RXNEIE) |
+			(0 << STM_SPI_CR2_ERRIE) |
+			(0 << STM_SPI_CR2_SSOE) |
+			(0 << STM_SPI_CR2_TXDMAEN) |
+			(0 << STM_SPI_CR2_RXDMAEN));
+
+	/* Clear RXNE */
+	(void) stm_spi->dr;
+
+	while (!(stm_spi->sr & (1 << STM_SPI_SR_TXE)));
+	stm_spi->dr = byte;
+}
 
 void
 ao_spi_recv(void *block, uint16_t len, uint8_t spi_index);
@@ -149,6 +177,11 @@ ao_spi_try_get_mask(struct stm_gpio *reg, uint16_t mask, uint8_t bus, uint32_t s
 
 #define ao_gpio_get(port, bit, pin) stm_gpio_get(port, bit)
 
+#define ao_gpio_set_bits(port, bits) stm_gpio_set_bits(port, bits)
+
+#define ao_gpio_clr_bits(port, bits) stm_gpio_clr_bits(port, bits);
+
+
 #define ao_enable_output(port,bit,pin,v) do {			\
 		ao_enable_port(port);				\
 		ao_gpio_set(port, bit, pin, v);			\
@@ -216,9 +249,6 @@ ao_dma_start(uint8_t index);
 void
 ao_dma_done_transfer(uint8_t index);
 
-void
-ao_dma_abort(uint8_t index);
-
 void
 ao_dma_alloc(uint8_t index);
 
@@ -245,12 +275,35 @@ ao_i2c_recv(void *block, uint16_t len, uint8_t i2c_index, uint8_t stop);
 void
 ao_i2c_init(void);
 
+#if USE_SERIAL_1_SW_FLOW || USE_SERIAL_2_SW_FLOW || USE_SERIAL_3_SW_FLOW
+#define HAS_SERIAL_SW_FLOW 1
+#else
+#define HAS_SERIAL_SW_FLOW 0
+#endif
+
+#if USE_SERIAL_1_FLOW && !USE_SERIAL_1_SW_FLOW || USE_SERIAL_2_FLOW && !USE_SERIAL_2_SW_FLOW || USE_SERIAL_3_FLOW && !USE_SERIAL_3_SW_FLOW
+#define HAS_SERIAL_HW_FLOW 1
+#else
+#define HAS_SERIAL_HW_FLOW 0
+#endif
+
 /* ao_serial_stm.c */
 struct ao_stm_usart {
 	struct ao_fifo		rx_fifo;
 	struct ao_fifo		tx_fifo;
 	struct stm_usart	*reg;
-	uint8_t			tx_started;
+	uint8_t			tx_running;
+	uint8_t			draining;
+#if HAS_SERIAL_SW_FLOW
+	/* RTS - 0 if we have FIFO space, 1 if not
+	 * CTS - 0 if we can send, 0 if not
+	 */
+	struct stm_gpio		*gpio_rts;
+	struct stm_gpio		*gpio_cts;
+	uint8_t			pin_rts;
+	uint8_t			pin_cts;
+	uint8_t			rts;
+#endif
 };
 
 #if HAS_SERIAL_1
@@ -287,6 +340,14 @@ ao_arch_memory_barrier() {
 	asm volatile("" ::: "memory");
 }
 
+static inline void
+ao_arch_irq_check(void) {
+	uint32_t	primask;
+	asm("mrs %0,primask" : "=&r" (primask));
+	if ((primask & 1) == 0)
+		ao_panic(AO_PANIC_IRQ);
+}
+
 #if HAS_TASK
 static inline void
 ao_arch_init_stack(struct ao_task *task, void *start)
@@ -335,13 +396,6 @@ static inline void ao_arch_save_stack(void) {
 
 static inline void ao_arch_restore_stack(void) {
 	uint32_t	sp;
-	uint32_t	control;
-
-	asm("mrs %0,control" : "=&r" (control));
-	control |= (1 << 1);
-	asm("msr control,%0" : : "r" (control));
-	asm("isb");
-
 	sp = (uint32_t) ao_cur_task->sp;
 
 	/* Switch stacks */
@@ -366,6 +420,22 @@ static inline void ao_arch_restore_stack(void) {
 #define HAS_SAMPLE_PROFILE 0
 #endif
 
+#if DEBUG
+#define HAS_ARCH_VALIDATE_CUR_STACK	1
+
+static inline void
+ao_validate_cur_stack(void)
+{
+	uint8_t		*psp;
+
+	asm("mrs %0,psp" : "=&r" (psp));
+	if (ao_cur_task &&
+	    psp <= ao_cur_task->stack &&
+	    psp >= ao_cur_task->stack - 256)
+		ao_panic(AO_PANIC_STACK);
+}
+#endif
+
 #if !HAS_SAMPLE_PROFILE
 #define HAS_ARCH_START_SCHEDULER	1
 
@@ -382,14 +452,7 @@ static inline void ao_arch_start_scheduler(void) {
 }
 #endif
 
-static inline void ao_arch_isr_stack(void) {
-	uint32_t	control;
-
-	asm("mrs %0,control" : "=&r" (control));
-	control &= ~(1 << 1);
-	asm("msr control,%0" : : "r" (control));
-	asm("isb");
-}
+#define ao_arch_isr_stack()
 
 #endif