X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fstlink-common.h;h=7553224cd9ba4007c8a76a41d92618413c32d256;hb=ff1e88398c0de2084b13196a422101224fed2779;hp=d2f274f82ec2da384bf43b4c557b678a18ecae4a;hpb=5197b8447314490061918b995c38b45a4b324623;p=fw%2Fstlink diff --git a/src/stlink-common.h b/src/stlink-common.h index d2f274f..7553224 100644 --- a/src/stlink-common.h +++ b/src/stlink-common.h @@ -104,7 +104,13 @@ extern "C" { #define STM32_CHIPID_F4 0x413 #define STM32_CHIPID_F1_HIGH 0x414 #define STM32_CHIPID_L1_MEDIUM 0x416 -#define STM32_CHIPID_L1_MEDIUM_PLUS 0x436 +#define STM32_CHIPID_L1_MEDIUM_PLUS 0x427 +/* + * 0x436 is actually assigned to some L1 chips that are called "Medium-Plus" + * and some that are called "High". 0x427 is assigned to the other "Medium- + * plus" chips. To make it a bit simpler we just call 427 MEDIUM_PLUS and + * 0x436 HIGH. + */ #define STM32_CHIPID_L1_HIGH 0x436 #define STM32_CHIPID_F1_CONN 0x418 #define STM32_CHIPID_F1_VL_MEDIUM 0x420 @@ -199,12 +205,22 @@ static const chip_params_t devices[] = { { .chip_id = STM32_CHIPID_L1_MEDIUM_PLUS, .description = "L1 Medium-Plus-density device", - .flash_size_reg = 0x1ff800CC, + .flash_size_reg = 0x1ff800cc, .flash_pagesize = 0x100, - .sram_size = 0x8000, + .sram_size = 0x8000,/*Not completely clear if there are some with 48K*/ .bootrom_base = 0x1ff00000, .bootrom_size = 0x1000 }, + { + .chip_id = STM32_CHIPID_L1_HIGH, + .description = "L1 High-density device", + .flash_size_reg = 0x1ff800cc, + .flash_pagesize = 0x100, + .sram_size = 0xC000, /*Not completely clear if there are some with 32K*/ + .bootrom_base = 0x1ff00000, + .bootrom_size = 0x1000 + }, + { .chip_id = STM32_CHIPID_F1_CONN, .description = "F1 Connectivity line device",