X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fstlink-common.c;h=05ee12cd3cdd44c77826f8f99ebda67ef065658e;hb=044b6dc7d6fbc71bed82615b6afc05fa1c9947ef;hp=66006f0835684fb62fe33f410d4407d5f11edef6;hpb=79429149716d1fa2107b47cbcfde232db4a20747;p=fw%2Fstlink diff --git a/src/stlink-common.c b/src/stlink-common.c index 66006f0..05ee12c 100644 --- a/src/stlink-common.c +++ b/src/stlink-common.c @@ -14,6 +14,11 @@ #include "stlink-common.h" #include "uglylogging.h" +#ifndef _WIN32 +#define O_BINARY 0 +#endif + + #define LOG_TAG __FILE__ #define DLOG(format, args...) ugly_log(UDEBUG, LOG_TAG, format, ## args) #define ILOG(format, args...) ugly_log(UINFO, LOG_TAG, format, ## args) @@ -447,6 +452,22 @@ int stlink_load_device_params(stlink_t *sl) { sl->flash_size = 0x100000; /* Use maximum, User must care!*/ } else if (sl->chip_id == STM32_CHIPID_F4) { sl->flash_size = 0x100000; //todo: RM0090 error; size register same address as unique ID + } else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM) { + // if the flash size is zero, we assume it is 128k, if not we calculate the real value + uint32_t flash_size = stlink_read_debug32(sl,params->flash_size_reg) & 0xffff; + if ( flash_size == 0 ) { + sl->flash_size = 128 * 1024; + } else { + sl->flash_size = flash_size * 1024; + } + } else if ((sl->chip_id & 0xFFF) == STM32_CHIPID_L1_MEDIUM_PLUS) { + uint32_t flash_size = stlink_read_debug32(sl, params->flash_size_reg) & 0x1; + // 0 is 384k and 1 is 256k + if ( flash_size == 0 ) { + sl->flash_size = 384 * 1024; + } else { + sl->flash_size = 256 * 1024; + } } else { uint32_t flash_size = stlink_read_debug32(sl, params->flash_size_reg) & 0xffff; sl->flash_size = flash_size * 1024; @@ -543,7 +564,7 @@ void stlink_write_mem32(stlink_t *sl, uint32_t addr, uint16_t len) { DLOG("*** stlink_write_mem32 %u bytes to %#x\n", len, addr); if (len % 4 != 0) { fprintf(stderr, "Error: Data length doesn't have a 32 bit alignment: +%d byte.\n", len % 4); - return; + abort(); } sl->backend->write_mem32(sl, addr, len); } @@ -553,7 +574,7 @@ void stlink_read_mem32(stlink_t *sl, uint32_t addr, uint16_t len) { if (len % 4 != 0) { // !!! never ever: fw gives just wrong values fprintf(stderr, "Error: Data length doesn't have a 32 bit alignment: +%d byte.\n", len % 4); - return; + abort(); } sl->backend->read_mem32(sl, addr, len); } @@ -563,7 +584,7 @@ void stlink_write_mem8(stlink_t *sl, uint32_t addr, uint16_t len) { if (len > 0x40 ) { // !!! never ever: Writing more then 0x40 bytes gives unexpected behaviour fprintf(stderr, "Error: Data length > 64: +%d byte.\n", len); - return; + abort(); } sl->backend->write_mem8(sl, addr, len); } @@ -757,7 +778,7 @@ static int map_file(mapped_file_t* mf, const char* path) { int error = -1; struct stat st; - const int fd = open(path, O_RDONLY); + const int fd = open(path, O_RDONLY | O_BINARY); if (fd == -1) { fprintf(stderr, "open(%s) == -1\n", path); return -1; @@ -829,6 +850,7 @@ int stlink_fwrite_sram size_t off; mapped_file_t mf = MAPPED_FILE_INITIALIZER; + if (map_file(&mf, path) == -1) { fprintf(stderr, "map_file() == -1\n"); return -1; @@ -849,7 +871,6 @@ int stlink_fwrite_sram fprintf(stderr, "unaligned addr or size\n"); goto on_error; } - /* do the copy by 1k blocks */ for (off = 0; off < mf.len; off += 1024) { size_t size = 1024; @@ -890,7 +911,7 @@ int stlink_fread(stlink_t* sl, const char* path, stm32_addr_t addr, size_t size) int error = -1; size_t off; int num_empty = 0; - unsigned char erased_pattern = (sl->chip_id == STM32_CHIPID_L1_MEDIUM)?0:0xff; + unsigned char erased_pattern = (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS)?0:0xff; const int fd = open(path, O_RDWR | O_TRUNC | O_CREAT, 00700); if (fd == -1) { @@ -1015,30 +1036,34 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t flashaddr) #if DEBUG_FLASH fprintf(stdout, "Erase Final CR:0x%x\n", read_flash_cr(sl)); #endif - } else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM) { + } else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS) { uint32_t val; - /* disable pecr protection */ - stlink_write_debug32(sl, STM32L_FLASH_PEKEYR, 0x89abcdef); - stlink_write_debug32(sl, STM32L_FLASH_PEKEYR, 0x02030405); - - /* check pecr.pelock is cleared */ + /* check if the locks are set */ val = stlink_read_debug32(sl, STM32L_FLASH_PECR); - if (val & (1 << 0)) { - WLOG("pecr.pelock not clear (%#x)\n", val); - return -1; - } + if((val & (1<<0))||(val & (1<<1))) { + /* disable pecr protection */ + stlink_write_debug32(sl, STM32L_FLASH_PEKEYR, 0x89abcdef); + stlink_write_debug32(sl, STM32L_FLASH_PEKEYR, 0x02030405); + + /* check pecr.pelock is cleared */ + val = stlink_read_debug32(sl, STM32L_FLASH_PECR); + if (val & (1 << 0)) { + WLOG("pecr.pelock not clear (%#x)\n", val); + return -1; + } - /* unlock program memory */ - stlink_write_debug32(sl, STM32L_FLASH_PRGKEYR, 0x8c9daebf); - stlink_write_debug32(sl, STM32L_FLASH_PRGKEYR, 0x13141516); + /* unlock program memory */ + stlink_write_debug32(sl, STM32L_FLASH_PRGKEYR, 0x8c9daebf); + stlink_write_debug32(sl, STM32L_FLASH_PRGKEYR, 0x13141516); - /* check pecr.prglock is cleared */ - val = stlink_read_debug32(sl, STM32L_FLASH_PECR); - if (val & (1 << 1)) { - WLOG("pecr.prglock not clear (%#x)\n", val); - return -1; + /* check pecr.prglock is cleared */ + val = stlink_read_debug32(sl, STM32L_FLASH_PECR); + if (val & (1 << 1)) { + WLOG("pecr.prglock not clear (%#x)\n", val); + return -1; + } } /* unused: unlock the option byte block */ @@ -1085,7 +1110,7 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t flashaddr) val = stlink_read_debug32(sl, STM32L_FLASH_PECR) | (1 << 0) | (1 << 1) | (1 << 2); stlink_write_debug32(sl, STM32L_FLASH_PECR, val); - } else if (sl->core_id == STM32VL_CORE_ID || sl->core_id == STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3) { + } else if (sl->core_id == STM32VL_CORE_ID || sl->core_id == STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3 || sl->chip_id == STM32_CHIPID_F37x) { /* wait for ongoing op to finish */ wait_flash_busy(sl); @@ -1117,7 +1142,7 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t flashaddr) } int stlink_erase_flash_mass(stlink_t *sl) { - if (sl->chip_id == STM32_CHIPID_L1_MEDIUM) { + if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS ) { /* erase each page */ int i = 0, num_pages = sl->flash_size/sl->flash_pgsz; for (i = 0; i < num_pages; i++) { @@ -1287,10 +1312,10 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) { const uint8_t* loader_code; size_t loader_size; - if (sl->chip_id == STM32_CHIPID_L1_MEDIUM) { /* stm32l */ + if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS ) { /* stm32l */ loader_code = loader_code_stm32l; loader_size = sizeof(loader_code_stm32l); - } else if (sl->core_id == STM32VL_CORE_ID || sl->chip_id == STM32_CHIPID_F3) { + } else if (sl->core_id == STM32VL_CORE_ID || sl->chip_id == STM32_CHIPID_F3 || sl->chip_id == STM32_CHIPID_F37x) { loader_code = loader_code_stm32vl; loader_size = sizeof(loader_code_stm32vl); } else if (sl->chip_id == STM32_CHIPID_F2 || sl->chip_id == STM32_CHIPID_F4) { @@ -1415,7 +1440,7 @@ int stm32l1_write_half_pages(stlink_t *sl, stm32_addr_t addr, uint8_t* base, uns return 0; } -int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned len) { +int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, uint32_t len) { size_t off; flash_loader_t fl; ILOG("Attempting to write %d (%#x) bytes to stm32 address: %u (%#x)\n", @@ -1527,7 +1552,7 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned } //STM32F4END - else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM) { + else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS) { /* use fast word write. todo: half page. */ uint32_t val; @@ -1633,7 +1658,7 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned val = stlink_read_debug32(sl, STM32L_FLASH_PECR) | (1 << 0) | (1 << 1) | (1 << 2); stlink_write_debug32(sl, STM32L_FLASH_PECR, val); - } else if (sl->core_id == STM32VL_CORE_ID || sl->core_id == STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3) { + } else if (sl->core_id == STM32VL_CORE_ID || sl->core_id == STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3 || sl->chip_id == STM32_CHIPID_F37x) { ILOG("Starting Flash write for VL/F0 core id\n"); /* flash loader initialization */ if (init_flash_loader(sl, &fl) == -1) { @@ -1683,7 +1708,7 @@ int stlink_fwrite_flash(stlink_t *sl, const char* path, stm32_addr_t addr) { /* write the file in flash at addr */ int err; unsigned int num_empty = 0, index; - unsigned char erased_pattern =(sl->chip_id == STM32_CHIPID_L1_MEDIUM)?0:0xff; + unsigned char erased_pattern =(sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS)?0:0xff; mapped_file_t mf = MAPPED_FILE_INITIALIZER; if (map_file(&mf, path) == -1) { ELOG("map_file() == -1\n"); @@ -1721,7 +1746,7 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons return -1; } - if (sl->chip_id == STM32_CHIPID_L1_MEDIUM) { + if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS) { size_t count = size / sizeof(uint32_t); if (size % sizeof(uint32_t)) ++count; @@ -1732,7 +1757,7 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons stlink_write_reg(sl, count, 2); /* count (32 bits words) */ stlink_write_reg(sl, fl->loader_addr, 15); /* pc register */ - } else if (sl->core_id == STM32VL_CORE_ID || sl->core_id == STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3) { + } else if (sl->core_id == STM32VL_CORE_ID || sl->core_id == STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3 || sl->chip_id == STM32_CHIPID_F37x) { size_t count = size / sizeof(uint16_t); if (size % sizeof(uint16_t)) ++count; @@ -1766,17 +1791,18 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons #define WAIT_ROUNDS 1000 /* wait until done (reaches breakpoint) */ for (i = 0; i < WAIT_ROUNDS; i++) { + usleep(10); if (is_core_halted(sl)) break; } if (i >= WAIT_ROUNDS) { - fatal("flash loader run error\n"); + ELOG("flash loader run error\n"); return -1; } /* check written byte count */ - if (sl->chip_id == STM32_CHIPID_L1_MEDIUM) { + if (sl->chip_id == STM32_CHIPID_L1_MEDIUM || sl->chip_id == STM32_CHIPID_L1_MEDIUM_PLUS) { size_t count = size / sizeof(uint32_t); if (size % sizeof(uint32_t)) ++count; @@ -1787,7 +1813,7 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons return -1; } - } else if (sl->core_id == STM32VL_CORE_ID || sl->core_id == STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3) { + } else if (sl->core_id == STM32VL_CORE_ID || sl->core_id == STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3 || sl->chip_id == STM32_CHIPID_F37x) { stlink_read_reg(sl, 2, &rr); if (rr.r[2] != 0) {