X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fsamd21%2Fsamd21.h;h=b101c6b9f3e97c100d803a3c3d938f88a254bb56;hb=14f1e175af85c0ef4539316d5ce049798a878fcb;hp=331fb7233ba4e17de39db6be7379f3dac904d174;hpb=62381d8582749dc2672a65cb6e7c5b8a404a3b45;p=fw%2Faltos diff --git a/src/samd21/samd21.h b/src/samd21/samd21.h index 331fb723..b101c6b9 100644 --- a/src/samd21/samd21.h +++ b/src/samd21/samd21.h @@ -567,6 +567,55 @@ struct samd21_dmac_desc { #define SAMD21_DMAC_DESC_BTCTRL_STEPSIZE_X64 6UL #define SAMD21_DMAC_DESC_BTCTRL_STEPSIZE_X128 7UL +struct samd21_eic { + vuint8_t ctrl; + vuint8_t status; + vuint8_t nmictrl; + vuint8_t nmiflag; + vuint32_t evctrl; + vuint32_t intenclr; + vuint32_t intenset; + + vuint32_t intflag; + vuint32_t wakeup; + vuint32_t config[2]; +}; + +extern struct samd21_eic samd21_eic; + +#define samd21_eic (*(struct samd21_eic *) 0x40001800) + +#define SAMD21_NUM_EIC 16 + +#define SAMD21_EIC_CTRL_ENABLE 1 +#define SAMD21_EIC_CTRL_SWRST 0 + +#define SAMD21_EIC_STATUS_SYNCBUSY 7 + +#define SAMD21_EIC_NMICTRL_NMIFILTEN 3 +#define SAMD21_EIC_NMICTRL_NMISENSE 0 + +#define SAMD21_EIC_NMIFLAG_NMI 0 + +#define SAMD21_EIC_EVCTRL_EXTINTEO(n) (n) + +#define SAMD21_EIC_INTENCLR_EXTINT(n) (n) + +#define SAMD21_EIC_INTENSET_EXTINT(n) (n) + +#define SAMD21_EIC_INTFLAG_EXTINT(n) (n) +#define SAMD21_EIC_WAKEUP_WAKEUPEN(n) (n) +#define SAMD21_EIC_CONFIG_N(n) ((n) >> 3) +#define SAMD21_EIC_CONFIG_SENSE(n) (((n) & 7) << 2) +#define SAMD21_EIC_CONFIG_FILTEN(n) (SAMD21_EIC_CONFIG_SENSE(n) + 3) +#define SAMD21_EIC_CONFIG_SENSE_NONE 0 +#define SAMD21_EIC_CONFIG_SENSE_RISE 1 +#define SAMD21_EIC_CONFIG_SENSE_FALL 2 +#define SAMD21_EIC_CONFIG_SENSE_BOTH 3 +#define SAMD21_EIC_CONFIG_SENSE_HIGH 4 +#define SAMD21_EIC_CONFIG_SENSE_LOW 5 +#define SAMD21_EIC_CONFIG_SENSE_MASK 7UL + struct samd21_nvmctrl { vuint32_t ctrla; vuint32_t ctrlb; @@ -728,6 +777,16 @@ samd21_port_pmux_set(struct samd21_port *port, uint8_t pin, uint8_t func) (1 << SAMD21_PORT_PINCFG_PMUXEN)); } +static inline uint8_t +samd21_port_pmux_get(struct samd21_port *port, uint8_t pin) +{ + uint8_t byte = pin >> 1; + uint8_t bit = (pin & 1) << 2; + uint8_t mask = 0xf << bit; + uint8_t value = (uint8_t) ((port->pmux[byte] & mask) >> bit); + return value; +} + static inline void samd21_port_pmux_clr(struct samd21_port *port, uint8_t pin) { @@ -811,6 +870,7 @@ struct samd21_adc { #define SAMD21_ADC_SWTRIG_START 1 #define SAMD21_ADC_INPUTCTRL_MUXPOS 0 +# define SAMD21_ADC_INPUTCTRL_MUXPOS_TEMP 0x18 # define SAMD21_ADC_INPUTCTRL_MUXPOS_BANDGAP 0x19 # define SAMD21_ADC_INPUTCTRL_MUXPOS_SCALEDCOREVCC 0x1a # define SAMD21_ADC_INPUTCTRL_MUXPOS_SCALEDIOVCC 0x1b @@ -1395,6 +1455,97 @@ extern struct samd21_evsys samd21_evsys; #define samd21_evsys (*(struct samd21_evsys *) 0x42000400) +#define SAMD21_EVSYS_CONTROL_SWRST 0 +#define SAMD21_EVSYS_CONTROL_GCLKREQ 4 + +#define SAMD21_EVSYS_CHANNEL_CHANNEL 0 + +#define SAMD21_EVSYS_CHANNEL_SWEVT 8 + +#define SAMD21_EVSYS_CHANNEL_EVGEN 16 +#define SAMD21_EVSYS_CHANNEL_EVGEN_NONE 0x00 +#define SAMD21_EVSYS_CHANNEL_EVGEN_RTC_CMP(i) (0x01 + (i)) +#define SAMD21_EVSYS_CHANNEL_EVGEN_OVF 0x03 +#define SAMD21_EVSYS_CHANNEL_EVGEN_PER(i) (0x04 + (i)) +#define SAMD21_EVSYS_CHANNEL_EVGEN_EXTINT(i) (0x0c + (i)) +#define SAMD21_EVSYS_CHANNEL_EVGEN_DMAC_CH(i) (0x1e + (i)) +#define SAMD21_EVSYS_CHANNEL_EVGEN_TCC0_OVF 0x22 +#define SAMD21_EVSYS_CHANNEL_EVGEN_TCC0_TRG 0x23 +#define SAMD21_EVSYS_CHANNEL_EVGEN_TCC0_CNT 0x29 +#define SAMD21_EVSYS_CHANNEL_EVGEN_TCC0_MCX(i) (0x25 + (i)) +#define SAMD21_EVSYS_CHANNEL_EVGEN_TCC1_OVF 0x29 +#define SAMD21_EVSYS_CHANNEL_EVGEN_TCC1_TRG 0x2a +#define SAMD21_EVSYS_CHANNEL_EVGEN_TCC1_CNT 0x2b +#define SAMD21_EVSYS_CHANNEL_EVGEN_TCC1_MCX(i) (0x2c + (i)) +#define SAMD21_EVSYS_CHANNEL_EVGEN_TCC2_OVF 0x2e +#define SAMD21_EVSYS_CHANNEL_EVGEN_TCC2_TRG 0x2f +#define SAMD21_EVSYS_CHANNEL_EVGEN_TCC2_CNT 0x30 +#define SAMD21_EVSYS_CHANNEL_EVGEN_TCC2_MCX(i) (0x31 + (i)) +#define SAMD21_EVSYS_CHANNEL_EVGEN_TC3_OVF 0x33 +#define SAMD21_EVSYS_CHANNEL_EVGEN_TC3_MC(i) (0x34 + (i)) +#define SAMD21_EVSYS_CHANNEL_EVGEN_TC4_OVF 0x36 +#define SAMD21_EVSYS_CHANNEL_EVGEN_TC4_MC(i) (0x37 + (i)) +#define SAMD21_EVSYS_CHANNEL_EVGEN_TC5_OVF 0x39 +#define SAMD21_EVSYS_CHANNEL_EVGEN_TC5_MC(i) (0x3a + (i)) +#define SAMD21_EVSYS_CHANNEL_EVGEN_TC6_OVF 0x3c +#define SAMD21_EVSYS_CHANNEL_EVGEN_TC6_MC(i) (0x3d + (i)) +#define SAMD21_EVSYS_CHANNEL_EVGEN_TC7_OVF 0x3f +#define SAMD21_EVSYS_CHANNEL_EVGEN_TC7_MC(i) (0x40 + (i)) +#define SAMD21_EVSYS_CHANNEL_EVGEN_ADC_RESRDY 0x42 +#define SAMD21_EVSYS_CHANNEL_EVGEN_ADC_WINMON 0x43 +#define SAMD21_EVSYS_CHANNEL_EVGEN_AC_COMP0 0x44 +#define SAMD21_EVSYS_CHANNEL_EVGEN_AC_COMP1 0x45 +#define SAMD21_EVSYS_CHANNEL_EVGEN_AC_WIN0 0x46 +#define SAMD21_EVSYS_CHANNEL_EVGEN_DAC_EMPTY 0x47 +#define SAMD21_EVSYS_CHANNEL_EVGEN_PTC_EOC 0x48 +#define SAMD21_EVSYS_CHANNEL_EVGEN_PTC_WCOMP 0x49 +#define SAMD21_EVSYS_CHANNEL_EVGEN_AC_COMP2 0x4a +#define SAMD21_EVSYS_CHANNEL_EVGEN_AC_COMP3 0x4b +#define SAMD21_EVSYS_CHANNEL_EVGEN_AC_WIN1 0x4c +#define SAMD21_EVSYS_CHANNEL_EVGEN_TCC3_OVF 0x4d +#define SAMD21_EVSYS_CHANNEL_EVGEN_TCC3_TRG 0x4e +#define SAMD21_EVSYS_CHANNEL_EVGEN_TCC3_CNT 0x4f +#define SAMD21_EVSYS_CHANNEL_EVGEN_TCC3_MCX(i) (0x50 + (i)) + +#define SAMD21_EVSYS_CHANNEL_PATH 24 +#define SAMD21_EVSYS_CHANNEL_PATH_SYNCHRONOUS 0 +#define SAMD21_EVSYS_CHANNEL_PATH_RESYNCHRONIZED 1 +#define SAMD21_EVSYS_CHANNEL_PATH_ASYNCHRONOUS 2 + +#define SAMD21_EVSYS_CHANNEL_EDGESEL 26 +#define SAMD21_EVSYS_CHANNEL_EDGESEL_NO_EVT_OUTPUT 0 +#define SAMD21_EVSYS_CHANNEL_EDGESEL_RISING_EDGE 1 +#define SAMD21_EVSYS_CHANNEL_EDGESEL_FALLING_EDGE 2 +#define SAMD21_EVSYS_CHANNEL_EDGESEL_BOTH_EDGES 3 + +#define SAMD21_EVSYS_USER_USER 0 +#define SAMD21_EVSYS_USER_USER_DMAC_CH(n) (0x00 + (n)) +#define SAMD21_EVSYS_USER_USER_TCC0_EV(n) (0x04 + (n)) +#define SAMD21_EVSYS_USER_USER_TCC0_MC(n) (0x06 + (n)) +#define SAMD21_EVSYS_USER_USER_TCC1_EV(n) (0x0a + (n)) +#define SAMD21_EVSYS_USER_USER_TCC1_MC(n) (0x0c + (n)) +#define SAMD21_EVSYS_USER_USER_TCC2_EV(n) (0x0e + (n)) +#define SAMD21_EVSYS_USER_USER_TCC2_MC(n) (0x10 + (n)) +#define SAMD21_EVSYS_USER_USER_TC(n) (0x12 + (n)) +#define SAMD21_EVSYS_USER_USER_ADC_START (0x17) +#define SAMD21_EVSYS_USER_USER_ADC_SYNC 0x18 +#define SAMD21_EVSYS_USER_USER_AC_COMP0 0x19 +#define SAMD21_EVSYS_USER_USER_AC_COMP1 0x1a +#define SAMD21_EVSYS_USER_USER_DAC_START 0x1b +#define SAMD21_EVSYS_USER_USER_PTC_STCONV 0x1c +#define SAMD21_EVSYS_USER_USER_AC_COMP2 0x1d +#define SAMD21_EVSYS_USER_USER_AC_COMP3 0x1e +#define SAMD21_EVSYS_USER_USER_TCC3_EV(n) (0x1f + (n)) +#define SAMD21_EVSYS_USER_USER_TCC3_MC(n) (0x21 + (n)) + +#define SAMD21_EVSYS_USER_CHANNEL 8 +#define SAMD21_EVSYS_USER_CHANNEL_NONE 0 +#define SAMD21_EVSYS_USER_CHANNEL_NUM(n) ((n) + 1) + + +#define SAMD21_EVSYS_CHSTATUS_USRRDY(n) (((n) & 7) | (((n) & 8) << 1)) +#define SAMD21_EVSYS_CHSTATUS_CHBUSY(n) (((n) & 7) | (((n) & 8) << 1) | 8) + /* sercom */ struct samd21_sercom { @@ -1459,7 +1610,14 @@ extern struct samd21_sercom samd21_sercom5; #define SAMD21_SERCOM_CTRLA_IBON 8 #define SAMD21_SERCOM_CTRLA_SAMPR 13 #define SAMD21_SERCOM_CTRLA_TXPO 16 +#define SAMD21_SERCOM_CTRLA_TXPO_TX_0 0 +#define SAMD21_SERCOM_CTRLA_TXPO_TX_2 1 +#define SAMD21_SERCOM_CTRLA_TXPO_TX_0_RTS_2_CTS_3 2 #define SAMD21_SERCOM_CTRLA_RXPO 20 +#define SAMD21_SERCOM_CTRLA_RXPO_RX_0 0 +#define SAMD21_SERCOM_CTRLA_RXPO_RX_1 1 +#define SAMD21_SERCOM_CTRLA_RXPO_RX_2 2 +#define SAMD21_SERCOM_CTRLA_RXPO_RX_3 3 #define SAMD21_SERCOM_CTRLA_SAMPA 22 #define SAMD21_SERCOM_CTRLA_FORM 24 #define SAMD21_SERCOM_CTRLA_CMODE 28