X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fsamd21%2Fao_arch_funcs.h;h=32670b45ca1897bc1f6a3016a4fd9c1cf4902930;hb=d4ac6abeb89282d9d96979b2a735aa4dc1e4c33d;hp=47656551c00305a17d4fe15a30325452d67329e0;hpb=9481e33348f098f3df73006641b9a18a04f2c482;p=fw%2Faltos

diff --git a/src/samd21/ao_arch_funcs.h b/src/samd21/ao_arch_funcs.h
index 47656551..32670b45 100644
--- a/src/samd21/ao_arch_funcs.h
+++ b/src/samd21/ao_arch_funcs.h
@@ -153,21 +153,57 @@ ao_enable_cs(struct samd21_port *port, uint8_t pin)
 #define AO_SPI_CONFIG_2		(2 << AO_SPI_CONFIG_BIT)
 #define AO_SPI_CONFIG_3		(3 << AO_SPI_CONFIG_BIT)
 
+#define AO_SPI_INDEX(id)	((uint8_t) ((id) & AO_SPI_INDEX_MASK))
+#define AO_SPI_CONFIG(id)	((id) & AO_SPI_CONFIG_MASK)
+#define AO_SPI_PIN_CONFIG(id)	((id) & (AO_SPI_INDEX_MASK | AO_SPI_CONFIG_MASK))
+#define AO_SPI_CPOL(id)		((uint32_t) (((id) >> AO_SPI_CPOL_BIT) & 1))
+#define AO_SPI_CPHA(id)		((uint32_t) (((id) >> AO_SPI_CPHA_BIT) & 1))
+#define AO_SPI_DOPO(id)		((uint32_t) (((id) >> AO_SPI_DOPO_BIT) & 3))
+#define AO_SPI_DIPO(id)		((uint32_t) (((id) >> AO_SPI_DIPO_BIT) & 3))
+
+#define AO_SPI_MAKE_MODE(pol,pha)	(((pol) << AO_SPI_CPOL_BIT) | ((pha) << AO_SPI_CPHA_BIT))
+#define AO_SPI_MODE_0		AO_SPI_MAKE_MODE(0,0)
+#define AO_SPI_MODE_1		AO_SPI_MAKE_MODE(0,1)
+#define AO_SPI_MODE_2		AO_SPI_MAKE_MODE(1,0)
+#define AO_SPI_MODE_3		AO_SPI_MAKE_MODE(1,1)
+
+#if HAS_SPI_0
 /*
  * PA08 SERCOM0.0 -> MOSI	(DOPO 0)
  * PA09 SERCOM0.1 -> SCLK	(DOPO 0)
  * PA10 SERCOM0.2 -> MISO	(DIPO 2)
  */
-#define AO_SPI_0_CONFIG_PA08_PA09_PA10	(AO_SPI_CONFIG_0 | \
-					 AO_SPI_DOPO_MOSI_0_SCLK_1 | \
-					 AO_SPI_DIPO_MISO_2)
+#define AO_SPI_0_PA08_PA09_PA10	(0 | AO_SPI_CONFIG_0 |		\
+				 AO_SPI_DOPO_MOSI_0_SCLK_1 |	\
+				 AO_SPI_DIPO_MISO_2)
+/*
+ * PA04 SERCOM0.0 -> MOSI	(DOPO 0)
+ * PA05 SERCOM0.1 -> SCLK	(DOPO 0)
+ * PA06 SERCOM0.2 -> MISO	(DIPO 2)
+ */
+#define AO_SPI_0_PA04_PA05_PA06	(0 | AO_SPI_CONFIG_1 |		\
+				 AO_SPI_DOPO_MOSI_0_SCLK_1 |	\
+				 AO_SPI_DIPO_MISO_2)
+#endif /* HAS_SPI_0 */
+
+#if HAS_SPI_3
+/*
+ * PA22 SERCOM3.0 -> MOSI	(DOPO 0)
+ * PA23 SERCOM3.1 -> SCLK	(DOPO 0)
+ * PA20 SERCOM3.2 -> MISO	(DIPO 2)
+ */
+#define AO_SPI_3_PA22_PA23_PA20	(3 | AO_SPI_CONFIG_0 |		\
+				 AO_SPI_DOPO_MOSI_0_SCLK_1 |	\
+				 AO_SPI_DIPO_MISO_2)
+#endif /* HAS_SPI_3 */
 
+#if HAS_SPI_4
 /*
  * PA04 SERCOM0.0 -> MOSI	(DOPO 0)
  * PA05 SERCOM0.1 -> SCLK	(DOPO 0)
  * PA16 SERCOM0.2 -> MISO	(DIPO 2)
  */
-#define AO_SPI_0_CONFIG_PA04_PA05_PA06	(AO_SPI_CONFIG_1 |		\
+#define AO_SPI_CONFIG_PA04_PA05_PA06	(0 | AO_SPI_CONFIG_1 |		\
 					 AO_SPI_DOPO_MOSI_0_SCLK_1 |	\
 					 AO_SPI_DIPO_MISO_2)
 
@@ -176,46 +212,28 @@ ao_enable_cs(struct samd21_port *port, uint8_t pin)
  * PB11 SERCOM4.3 -> SCLK	(DOPO 1)
  * PA12	SERCOM4.0 -> MISO	(DIPO 0)
  */
-#define AO_SPI_4_CONFIG_PB10_PB11_PA12	(AO_SPI_CONFIG_0 |		\
-					 AO_SPI_DOPO_MOSI_2_SCLK_3 |	\
-					 AO_SPI_DIPO_MISO_0)
+#define AO_SPI_4_PB10_PB11_PA12	(4 | AO_SPI_CONFIG_0 |		\
+				 AO_SPI_DOPO_MOSI_2_SCLK_3 |	\
+				 AO_SPI_DIPO_MISO_0)
+#endif /* HAS_SPI_4 */
 
+#if HAS_SPI_5
 /*
  * PB22 SERCOM5.2 -> MOSI	(DOPO 1)
  * PB23 SERCOM5.3 -> SCLK	(DOPO 1)
  * PB03 SERCOM5.1 -> MISO	(DIPO 1)
  */
-#define AO_SPI_5_CONFIG_PB22_PB23_PB03	(AO_SPI_CONFIG_3 |		\
-					 AO_SPI_DOPO_MOSI_2_SCLK_3 |	\
-					 AO_SPI_DIPO_MISO_1)
-
-#define AO_SPI_INDEX(id)	((uint8_t) ((id) & AO_SPI_INDEX_MASK))
-#define AO_SPI_CONFIG(id)	((id) & AO_SPI_CONFIG_MASK)
-#define AO_SPI_PIN_CONFIG(id)	((id) & (AO_SPI_INDEX_MASK | AO_SPI_CONFIG_MASK))
-#define AO_SPI_CPOL(id)		((uint32_t) (((id) >> AO_SPI_CPOL_BIT) & 1))
-#define AO_SPI_CPHA(id)		((uint32_t) (((id) >> AO_SPI_CPHA_BIT) & 1))
-#define AO_SPI_DOPO(id)		((uint32_t) (((id) >> AO_SPI_DOPO_BIT) & 3))
-#define AO_SPI_DIPO(id)		((uint32_t) (((id) >> AO_SPI_DIPO_BIT) & 3))
-
-/*
- * We're not going to do any fancy SPI pin remapping, just use the first
- * three PAD pins, which means:
- *
- * MOSI: PAD.0
- * SCK:  PAD.1
- * MISO: PAD.2
- */
-
-#define AO_SPI_0_PA08_PA09_PA10	(0 | AO_SPI_0_CONFIG_PA08_PA09_PA10)
-#define AO_SPI_0_PA04_PA05_PA06	(0 | AO_SPI_0_CONFIG_PA04_PA05_PA06)
-
-#define AO_SPI_4_PB10_PB11_PA12 (4 | AO_SPI_4_CONFIG_PB10_PB11_PA12)
-
-#define AO_SPI_5_PB22_PB23_PB03	(5 | AO_SPI_5_CONFIG_PB22_PB23_PB03)
+#define AO_SPI_5_PB22_PB23_PB03	(5 | AO_SPI_CONFIG_0 |		\
+				 AO_SPI_DOPO_MOSI_2_SCLK_3 |	\
+				 AO_SPI_DIPO_MISO_1)
+#endif /* HAS_SPI_5 */
 
 void
 ao_spi_send(const void *block, uint16_t len, uint16_t spi_index);
 
+void
+ao_spi_send_fixed(uint8_t data, uint16_t len, uint16_t spi_index);
+
 void
 ao_spi_recv(void *block, uint16_t len, uint16_t spi_index);
 
@@ -268,8 +286,8 @@ ao_spi_speed(uint32_t hz)
 {
 	int32_t	baud = (int32_t) (AO_SYSCLK / (2 * hz)) - 1;
 
-	if (baud < 0)
-		baud = 0;
+	if (baud < 1)
+		baud = 1;
 	if (baud > 255)
 		baud = 255;
 	return (uint8_t) baud;