X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fpic16%2Fralloc.c;h=0fec45041ddb85bb4eeb038038336b8081022444;hb=8332acb8ebcdd1490779c012db097c74c71d039e;hp=7d5e782dce4bf89e3a19a231979715bc1cd612fb;hpb=3e896c0ba619568082bc9e952265022cad9fe911;p=fw%2Fsdcc diff --git a/src/pic16/ralloc.c b/src/pic16/ralloc.c index 7d5e782d..0fec4504 100644 --- a/src/pic16/ralloc.c +++ b/src/pic16/ralloc.c @@ -37,6 +37,9 @@ #define STRCASECMP strcasecmp #endif +//#define USE_ONSTACK + + /*-----------------------------------------------------------------*/ /* At this point we start getting processor specific although */ /* some routines are non-processor specific & can be reused when */ @@ -73,18 +76,25 @@ set *pic16_dynProcessorRegs=NULL; set *pic16_dynDirectRegs=NULL; set *pic16_dynDirectBitRegs=NULL; set *pic16_dynInternalRegs=NULL; +set *pic16_dynAccessRegs=NULL; -static hTab *dynDirectRegNames= NULL; +static hTab *dynDirectRegNames=NULL; +static hTab *dynAllocRegNames=NULL; +static hTab *dynProcRegNames=NULL; +static hTab *dynAccessRegNames=NULL; //static hTab *regHash = NULL; /* a hash table containing ALL registers */ +extern set *sectNames; + set *pic16_rel_udata=NULL; /* relocatable uninitialized registers */ set *pic16_fix_udata=NULL; /* absolute uninitialized registers */ set *pic16_equ_data=NULL; /* registers used by equates */ set *pic16_int_regs=NULL; /* internal registers placed in access bank 0 to 0x7f */ +set *pic16_acs_udata=NULL; /* access bank variables */ set *pic16_builtin_functions=NULL; -static int dynrIdx=0x10; //0x20; // starting temporary register rIdx +static int dynrIdx=0x00; //0x20; // starting temporary register rIdx static int rDirectIdx=0; int pic16_nRegs = 128; // = sizeof (regspic16) / sizeof (regs); @@ -391,7 +401,7 @@ regs* newReg(short type, short pc_type, int rIdx, char *name, int size, int alia /* regWithIdx - Search through a set of registers that matches idx */ /*-----------------------------------------------------------------*/ static regs * -regWithIdx (set *dRegs, int idx, int fixed) +regWithIdx (set *dRegs, int idx, unsigned fixed) { regs *dReg; @@ -454,6 +464,8 @@ pic16_allocProcessorRegister(int rIdx, char * name, short po_type, int alias) reg->wasUsed = 0; // we do not know if they are going to be used at all reg->accessBank = 1; // implicit add access Bank + hTabAddItem(&dynProcRegNames, regname2key(reg->name), reg); + return addSet(&pic16_dynProcessorRegs, reg); } @@ -500,10 +512,11 @@ allocReg (short type) } addSet(&pic16_dynAllocRegs, reg); + hTabAddItem(&dynAllocRegNames, regname2key(reg->name), reg); reg->isFree=0; -// debugLog ("%s of type %s\n", __FUNCTION__, debugLogRegType (type)); + debugLog ("%s of type %s for register rIdx: %d (0x%x)\n", __FUNCTION__, debugLogRegType (type), dynrIdx-1, dynrIdx-1); // fprintf(stderr,"%s:%d: %s\t%s addr= 0x%x\trIdx= 0x%02x isFree: %d\n", // __FILE__, __LINE__, __FUNCTION__, reg->name, reg->address, reg->rIdx, reg->isFree); @@ -511,6 +524,7 @@ allocReg (short type) if(reg) { reg->accessBank = 1; /* this is a temporary register alloc in accessBank */ reg->isLocal = 1; /* this is a local frame register */ +// reg->wasUsed = 1; } if (currFunc) { @@ -546,6 +560,7 @@ pic16_dirregWithName (char *name) while(reg) { if(STRCASECMP(reg->name, name) == 0) { +// fprintf(stderr, "%s:%d: FOUND name = %s\thash = %d\n", __FUNCTION__, __LINE__, reg->name, hkey); return(reg); } @@ -556,6 +571,128 @@ pic16_dirregWithName (char *name) return NULL; // name wasn't found in the hash table } +/*-----------------------------------------------------------------*/ +/* pic16_allocregWithName - search for register by name */ +/*-----------------------------------------------------------------*/ +regs * +pic16_allocregWithName (char *name) +{ + int hkey; + regs *reg; + + if(!name) + return NULL; + + /* hash the name to get a key */ + + hkey = regname2key(name); + +// fprintf(stderr, "%s:%d: name = %s\thash = %d\n", __FUNCTION__, __LINE__, name, hkey); + + reg = hTabFirstItemWK(dynAllocRegNames, hkey); + + while(reg) { + + if(STRCASECMP(reg->name, name) == 0) { + return(reg); + } + + reg = hTabNextItemWK (dynAllocRegNames); + + } + + return NULL; // name wasn't found in the hash table + +} + + +/*-----------------------------------------------------------------*/ +/* pic16_procregWithName - search for register by name */ +/*-----------------------------------------------------------------*/ +regs * +pic16_procregWithName (char *name) +{ + int hkey; + regs *reg; + + if(!name) + return NULL; + + /* hash the name to get a key */ + + hkey = regname2key(name); + +// fprintf(stderr, "%s:%d: name = %s\thash = %d\n", __FUNCTION__, __LINE__, name, hkey); + + reg = hTabFirstItemWK(dynProcRegNames, hkey); + + while(reg) { + + if(STRCASECMP(reg->name, name) == 0) { + return(reg); + } + + reg = hTabNextItemWK (dynProcRegNames); + + } + + return NULL; // name wasn't found in the hash table + +} + +/*-----------------------------------------------------------------*/ +/* pic16_accessregWithName - search for register by name */ +/*-----------------------------------------------------------------*/ +regs * +pic16_accessregWithName (char *name) +{ + int hkey; + regs *reg; + + if(!name) + return NULL; + + /* hash the name to get a key */ + + hkey = regname2key(name); + +// fprintf(stderr, "%s:%d: name = %s\thash = %d\n", __FUNCTION__, __LINE__, name, hkey); + + reg = hTabFirstItemWK(dynAccessRegNames, hkey); + + while(reg) { + + if(STRCASECMP(reg->name, name) == 0) { + return(reg); + } + + reg = hTabNextItemWK (dynAccessRegNames); + + } + + return NULL; // name wasn't found in the hash table + +} + +regs *pic16_regWithName(char *name) +{ + regs *reg; + + reg = pic16_dirregWithName( name ); + if(reg)return reg; + + reg = pic16_procregWithName( name ); + if(reg)return reg; + + reg = pic16_allocregWithName( name ); + if(reg)return reg; + + reg = pic16_accessregWithName( name ); + if(reg)return reg; + + return NULL; +} + /*-----------------------------------------------------------------*/ /* pic16_allocDirReg - allocates register of given type */ @@ -574,15 +711,49 @@ pic16_allocDirReg (operand *op ) name = OP_SYMBOL (op)->rname[0] ? OP_SYMBOL (op)->rname : OP_SYMBOL (op)->name; - if(!SPEC_OCLS( OP_SYM_ETYPE(op))) { // patch 13 - if(pic16_debug_verbose) // - { // - fprintf(stderr, "%s:%d symbol %s(r:%s) is not assigned to a memmap\n", __FILE__, __LINE__, // - OP_SYMBOL(op)->name, OP_SYMBOL(op)->rname); // - } // - return NULL; // - } // patch 13 + if(!SPEC_OCLS( OP_SYM_ETYPE(op))) { +#if 1 + if(pic16_debug_verbose) + { + fprintf(stderr, "%s:%d symbol %s(r:%s) is not assigned to a memmap\n", __FILE__, __LINE__, + OP_SYMBOL(op)->name, OP_SYMBOL(op)->rname); + } +#endif + return NULL; + } + + if(!IN_DIRSPACE( SPEC_OCLS( OP_SYM_ETYPE(op))) + || !IN_FARSPACE(SPEC_OCLS( OP_SYM_ETYPE(op))) ) { + +#if 0 + if(pic16_debug_verbose) { + fprintf(stderr, "dispace:%d farspace:%d codespace:%d regspace:%d stack:%d eeprom: %d regparm: %d isparm: %d\n", + IN_DIRSPACE( SPEC_OCLS( OP_SYM_ETYPE(op))), + IN_FARSPACE( SPEC_OCLS( OP_SYM_ETYPE(op))), + IN_CODESPACE( SPEC_OCLS( OP_SYM_ETYPE(op))), + IN_REGSP( SPEC_OCLS( OP_SYM_ETYPE(op))), + IN_STACK( OP_SYM_ETYPE(op)), + SPEC_OCLS(OP_SYM_ETYPE(op)) == eeprom, + IS_REGPARM(OP_SYM_ETYPE(op)), + IS_PARM(op)); + + fprintf(stderr, "%s:%d symbol %s NOT in dirspace\n", __FILE__, __LINE__, + OP_SYMBOL(op)->name); + } +#endif + + } + + + + if (IS_CODE ( OP_SYM_ETYPE(op)) ) { +// fprintf(stderr, "%s:%d sym: %s in codespace\n", __FUNCTION__, __LINE__, OP_SYMBOL(op)->name); + return NULL; + } + + if(IS_ITEMP(op))return NULL; + debugLog ("%s:%d symbol name %s\n", __FUNCTION__, __LINE__, name); // fprintf(stderr, "%s symbol name %s\n", __FUNCTION__,name); @@ -611,27 +782,8 @@ pic16_allocDirReg (operand *op ) debugAopGet(NULL, op); } - if (IS_CODE ( OP_SYM_ETYPE(op)) ) - return NULL; - /* First, search the hash table to see if there is a register with this name */ - if (SPEC_ABSA ( OP_SYM_ETYPE(op)) && !(IS_BITVAR (OP_SYM_ETYPE(op))) ) { - reg=NULL; -// reg = regWithIdx (pic16_dynProcessorRegs, SPEC_ADDR ( OP_SYM_ETYPE(op)), 1); - -#if 0 - if(!reg) - fprintf(stderr,"%s:%d: ralloc %s is at fixed address but not a processor reg, addr=0x%x\n", - __FUNCTION__, __LINE__, name, SPEC_ADDR ( OP_SYM_ETYPE(op))); - else - fprintf(stderr,"%s:%d: ralloc %s at fixed address has already been declared, addr=0x%x\n", - __FUNCTION__, __LINE__, name, SPEC_ADDR ( OP_SYM_ETYPE(op))); -#endif - } else { -// fprintf(stderr,"ralloc:%d %s \n", __LINE__,name); - - reg = pic16_dirregWithName(name); - } + reg = pic16_dirregWithName(name); if(!reg) { int address = 0; @@ -646,71 +798,74 @@ pic16_allocDirReg (operand *op ) /* Register wasn't found in hash, so let's create * a new one and put it in the hash table AND in the * dynDirectRegNames set */ - if(IN_CODESPACE( SPEC_OCLS( OP_SYM_ETYPE(op)))) { - -// if(pic16_debug_verbose) -// fprintf(stderr, "%s:%d symbol %s in codespace\n", __FILE__, __LINE__, -// OP_SYMBOL(op)->name); - + if(IS_CODE(OP_SYM_ETYPE(op)) || IN_CODESPACE( SPEC_OCLS( OP_SYM_ETYPE(op)))) { debugLog("%s:%d sym: %s in codespace\n", __FUNCTION__, __LINE__, OP_SYMBOL(op)->name); return NULL; } - if(1) { //!PIC16_IS_CONFIG_ADDRESS(address)) { -// fprintf(stderr,"%s:allocating new reg %s\n",__FUNCTION__, name); - /* this is an error, why added? -- VR */ -// if(SPEC_SCLS(OP_SYM_ETYPE(op)))regtype = REG_SFR; +#if 0 + if(OP_SYMBOL(op)->onStack) { + fprintf(stderr, "%s:%d onStack %s offset: %d\n", __FILE__, __LINE__, + OP_SYMBOL(op)->name, OP_SYMBOL(op)->stack); + } +#endif - if(OP_SYMBOL(op)->onStack) { -// fprintf(stderr, "%s:%d onStack %s\n", __FILE__, __LINE__, OP_SYMBOL(op)->name); - OP_SYMBOL(op)->onStack = 0; - SPEC_OCLS(OP_SYM_ETYPE(op)) = data; - regtype = REG_GPR; - } + if(!IN_DIRSPACE( SPEC_OCLS( OP_SYM_ETYPE(op))) + || !IN_FARSPACE(SPEC_OCLS( OP_SYM_ETYPE(op))) ) { - if(!IN_DIRSPACE( SPEC_OCLS( OP_SYM_ETYPE(op)))) { // patch 13 - if(pic16_debug_verbose) // - { // - fprintf(stderr, "dispace:%d farspace:%d codespace:%d regspace:%d stack:%d\n", - IN_DIRSPACE( SPEC_OCLS( OP_SYM_ETYPE(op))), - IN_FARSPACE( SPEC_OCLS( OP_SYM_ETYPE(op))), - IN_CODESPACE( SPEC_OCLS( OP_SYM_ETYPE(op))), - IN_REGSP( SPEC_OCLS( OP_SYM_ETYPE(op))), - IN_STACK( OP_SYM_ETYPE(op))); - - fprintf(stderr, "%s:%d symbol %s NOT in dirspace\n", __FILE__, __LINE__, // - OP_SYMBOL(op)->name); // - } // -// return NULL; // - } // patch 13 - - reg = newReg(regtype, PO_DIR, rDirectIdx++, name,getSize (OP_SYMBOL (op)->type),0, op); - debugLog ("%d -- added %s to hash, size = %d\n", __LINE__, name,reg->size); - -// hTabAddItem(&dynDirectRegNames, regname2key(name), reg); /* commented out */ - -// if (SPEC_ABSA ( OP_SYM_ETYPE(op)) ) { -// fprintf(stderr, " ralloc.c at fixed address: %s - changing to REG_SFR\n",name); -// reg->type = REG_SFR; -// } - - if (IS_BITVAR (OP_SYM_ETYPE(op))) { -// fprintf(stderr, "%s:%d adding %s in bit registers\n", __FILE__, __LINE__, reg->name); - addSet(&pic16_dynDirectBitRegs, reg); - reg->isBitField = 1; - } else { -// fprintf(stderr, "%s:%d adding %s in direct registers\n", __FILE__, __LINE__, reg->name); -// addSet(&pic16_dynDirectRegs, reg); - checkAddReg(&pic16_dynDirectRegs, reg); +#if 0 + if(pic16_debug_verbose) + { + fprintf(stderr, "dispace:%d farspace:%d codespace:%d regspace:%d stack:%d eeprom: %d\n", + IN_DIRSPACE( SPEC_OCLS( OP_SYM_ETYPE(op))), + IN_FARSPACE( SPEC_OCLS( OP_SYM_ETYPE(op))), + IN_CODESPACE( SPEC_OCLS( OP_SYM_ETYPE(op))), + IN_REGSP( SPEC_OCLS( OP_SYM_ETYPE(op))), + IN_STACK( OP_SYM_ETYPE(op)), + SPEC_OCLS(OP_SYM_ETYPE(op)) == eeprom); + + fprintf(stderr, "%s:%d symbol %s NOT in dirspace\n", __FILE__, __LINE__, + OP_SYMBOL(op)->name); } - +#endif + } + + reg = newReg(regtype, PO_DIR, rDirectIdx++, name,getSize (OP_SYMBOL (op)->type),0, op); + debugLog ("%d -- added %s to hash, size = %d\n", __LINE__, name,reg->size); + + if( SPEC_SCLS( OP_SYM_ETYPE( op ) ) == S_REGISTER ) { + fprintf(stderr, "%s:%d symbol %s is declared as register\n", __FILE__, __LINE__, + name); + + reg->accessBank = 1; + checkAddReg(&pic16_dynAccessRegs, reg); + hTabAddItem(&dynAccessRegNames, regname2key(name), reg); + + return (reg); + } + + +// if (SPEC_ABSA ( OP_SYM_ETYPE(op)) ) { +// fprintf(stderr, " ralloc.c at fixed address: %s - changing to REG_SFR\n",name); +// reg->type = REG_SFR; +// } + + if (IS_BITVAR (OP_SYM_ETYPE(op))) { +// fprintf(stderr, "%s:%d adding %s in bit registers\n", __FILE__, __LINE__, reg->name); + addSet(&pic16_dynDirectBitRegs, reg); + reg->isBitField = 1; } else { - debugLog (" -- %s is declared at address 0x30000x\n",name); -// fprintf(stderr, " -- %s is declared at address 0x30000x\n",name); - - return NULL; +// fprintf(stderr, "%s:%d adding %s in direct registers\n", __FILE__, __LINE__, reg->name); +// addSet(&pic16_dynDirectRegs, reg); + + checkAddReg(&pic16_dynDirectRegs, reg); } + + } else { +// debugLog (" -- %s is declared at address 0x30000x\n",name); + return (reg); /* This was NULL before, but since we found it + * why not just return it?! */ } if (SPEC_ABSA ( OP_SYM_ETYPE(op)) ) { @@ -751,7 +906,7 @@ pic16_allocRegByName (char *name, int size, operand *op) * a new one and put it in the hash table AND in the * dynDirectRegNames set */ -// fprintf (stderr,"%s:%d symbol name %s\tregop= %p\n", __FUNCTION__, __LINE__, name, op); + fprintf (stderr,"%s:%d symbol name %s\tregop= %p\n", __FUNCTION__, __LINE__, name, op); reg = newReg(REG_GPR, PO_DIR, rDirectIdx++, name,size,0, op); @@ -797,7 +952,7 @@ regs *pic16_typeRegWithIdx (int idx, int type, int fixed) } break; case REG_SFR: - if( (dReg = regWithIdx ( pic16_dynProcessorRegs, idx, fixed)) != NULL ) { + if( (dReg = regWithIdx ( pic16_dynProcessorRegs, idx, 1)) != NULL ) { debugLog ("Found a Processor Register!\n"); return dReg; } @@ -826,8 +981,10 @@ pic16_regWithIdx (int idx) if( (dReg = pic16_typeRegWithIdx(idx,REG_SFR,0)) != NULL) return dReg; +#if 0 if( (dReg = pic16_typeRegWithIdx(idx,REG_STK,0)) != NULL) return dReg; +#endif return NULL; } @@ -849,7 +1006,7 @@ pic16_allocWithIdx (int idx) debugLog ("Found a Dynamic Register!\n"); } else if( (dReg = regWithIdx ( pic16_dynStackRegs, idx,0)) != NULL ) { debugLog ("Found a Stack Register!\n"); - } else if( (dReg = regWithIdx ( pic16_dynProcessorRegs, idx,0)) != NULL ) { + } else if( (dReg = regWithIdx ( pic16_dynProcessorRegs, idx,1)) != NULL ) { debugLog ("Found a Processor Register!\n"); fprintf(stderr, "Found a processor register! %s\n", dReg->name); } else if( (dReg = regWithIdx ( pic16_dynInternalRegs, idx,0)) != NULL ) { @@ -975,12 +1132,15 @@ static void writeSetUsedRegs(FILE *of, set *dRegs) extern void pic16_groupRegistersInSection(set *regset); extern void pic16_dump_equates(FILE *of, set *equs); +extern void pic16_dump_access(FILE *of, set *section); //extern void pic16_dump_map(void); extern void pic16_dump_usection(FILE *of, set *section, int fix); extern void pic16_dump_isection(FILE *of, set *section, int fix); extern void pic16_dump_int_registers(FILE *of, set *section); extern void pic16_dump_idata(FILE *of, set *idataSymSet); +extern void pic16_dump_gsection(FILE *of, set *sections); + static void packBits(set *bregs) { set *regset; @@ -1043,140 +1203,56 @@ static void packBits(set *bregs) } - - -#if 0 -static void bitEQUs(FILE *of, set *bregs) -{ - regs *breg,*bytereg; - int bit_no=0; - - //fprintf(stderr," %s\n",__FUNCTION__); - for (breg = setFirstItem(bregs) ; breg ; - breg = setNextItem(bregs)) { - - //fprintf(stderr,"bit reg: %s\n",breg->name); - - bytereg = breg->reg_alias; - if(bytereg) - fprintf (of, "%s\tEQU\t( (%s<<3)+%d)\n", - breg->name, - bytereg->name, - breg->rIdx & 0x0007); - - else { - fprintf(stderr, "bit field is not assigned to a register\n"); - fprintf (of, "%s\tEQU\t( (bitfield%d<<3)+%d)\n", - breg->name, - bit_no>>3, - bit_no & 0x0007); - - bit_no++; - } - } - -} - -static void aliasEQUs(FILE *of, set *fregs, int use_rIdx) -{ - regs *reg; - - - for (reg = setFirstItem(fregs) ; reg ; - reg = setNextItem(fregs)) { - - if(!reg->isEmitted && reg->wasUsed) { - if(use_rIdx) { - if (reg->type != REG_SFR) { - fprintf (of, "%s\tEQU\t0x%03x\n", - reg->name, - reg->rIdx); - } - } - else - fprintf (of, "%s\tEQU\t0x%03x\n", - reg->name, - reg->address); - } - } - -} -#endif - void pic16_writeUsedRegs(FILE *of) { packBits(pic16_dynDirectBitRegs); +// fprintf(stderr, "%s: pic16_dynAllocRegs\n", __FUNCTION__); pic16_groupRegistersInSection(pic16_dynAllocRegs); + +// fprintf(stderr, "%s: pic16_dynInternalRegs\n", __FUNCTION__); pic16_groupRegistersInSection(pic16_dynInternalRegs); + +// fprintf(stderr, "%s: pic16_dynStackRegs\n", __FUNCTION__); pic16_groupRegistersInSection(pic16_dynStackRegs); + +// fprintf(stderr, "%s: pic16_dynDirectRegs\n", __FUNCTION__); pic16_groupRegistersInSection(pic16_dynDirectRegs); + +// fprintf(stderr, "%s: pic16_dynDirectBitsRegs\n", __FUNCTION__); pic16_groupRegistersInSection(pic16_dynDirectBitRegs); + +// fprintf(stderr, "%s: pic16_dynProcessorRegs\n", __FUNCTION__); pic16_groupRegistersInSection(pic16_dynProcessorRegs); +// fprintf(stderr, "%s: pic16_dynAccessRegs\n", __FUNCTION__); + pic16_groupRegistersInSection(pic16_dynAccessRegs); -#if 0 - pic16_assignFixedRegisters(pic16_dynAllocRegs); - pic16_assignFixedRegisters(pic16_dynStackRegs); - pic16_assignFixedRegisters(pic16_dynDirectRegs); - pic16_assignFixedRegisters(pic16_dynProcessorRegs); - - pic16_assignRelocatableRegisters(pic16_dynDirectBitRegs, 0); - pic16_assignRelocatableRegisters(pic16_dynInternalRegs,0); - pic16_assignRelocatableRegisters(pic16_dynAllocRegs,0); - pic16_assignRelocatableRegisters(pic16_dynStackRegs,0); - pic16_assignRelocatableRegisters(pic16_dynDirectRegs,0); -#endif - -// pic16_dump_map(); -// pic16_dump_cblock(of); - /* dump equates */ pic16_dump_equates(of, pic16_equ_data); +// pic16_dump_esection(of, pic16_rel_eedata, 0); +// pic16_dump_esection(of, pic16_fix_eedata, 0); + + /* dump access bank symbols */ + pic16_dump_access(of, pic16_acs_udata); + /* dump initialised data */ pic16_dump_isection(of, rel_idataSymSet, 0); pic16_dump_isection(of, fix_idataSymSet, 1); -// pic16_dump_idata(of, idataSymSet); - /* dump internal registers */ pic16_dump_int_registers(of, pic16_int_regs); + /* dump generic section variables */ + pic16_dump_gsection(of, sectNames); + /* dump other variables */ pic16_dump_usection(of, pic16_rel_udata, 0); pic16_dump_usection(of, pic16_fix_udata, 1); } -#if 0 -/*-----------------------------------------------------------------*/ -/* allDefsOutOfRange - all definitions are out of a range */ -/*-----------------------------------------------------------------*/ -static bool -allDefsOutOfRange (bitVect * defs, int fseq, int toseq) -{ - int i; - - debugLog ("%s\n", __FUNCTION__); - if (!defs) - return TRUE; - - for (i = 0; i < defs->size; i++) - { - iCode *ic; - - if (bitVectBitValue (defs, i) && - (ic = hTabItemWithKey (iCodehTab, i)) && - (ic->seq >= fseq && ic->seq <= toseq)) - - return FALSE; - - } - - return TRUE; -} -#endif /*-----------------------------------------------------------------*/ /* computeSpillable - given a point find the spillable live ranges */ @@ -1661,7 +1737,9 @@ selectSpil (iCode * ic, eBBlock * ebp, symbol * forSym) /* check if there are any live ranges that not used in the remainder of the block */ - if (!_G.blockSpil && (selectS = liveRangesWith (lrcs, notUsedInRemaining, ebp, ic))) + if (!_G.blockSpil && + !isiCodeInFunctionCall (ic) && + (selectS = liveRangesWith (lrcs, notUsedInRemaining, ebp, ic))) { sym = leastUsedLR (selectS); if (!sym->remat) @@ -1897,6 +1975,13 @@ deassignLRs (iCode * ic, eBBlock * ebp) if (!bitVectBitValue (_G.regAssigned, sym->key)) continue; + /* special case for shifting: there is a case where shift count + * can be allocated in the same register as the result, so do not + * free right registers if same as result registers, cause genShiftLeft + * will fail -- VR */ + if(ic->op == LEFT_OP) + continue; + /* special case check if this is an IFX & the privious one was a pop and the previous one was not spilt then keep track @@ -1927,6 +2012,7 @@ deassignLRs (iCode * ic, eBBlock * ebp) (result = OP_SYMBOL (IC_RESULT (ic))) && /* has a result */ result->liveTo > ic->seq && /* and will live beyond this */ result->liveTo <= ebp->lSeq && /* does not go beyond this block */ + result->liveFrom == ic->seq && /* does not start before here */ result->regType == sym->regType && /* same register types */ result->nRegs && /* which needs registers */ !result->isspilt && /* and does not already have them */ @@ -2238,7 +2324,7 @@ serialRegAssign (eBBlock ** ebbs, int count) /* else we assign registers to it */ _G.regAssigned = bitVectSetBit (_G.regAssigned, sym->key); - debugLog (" %d - \n", __LINE__); + debugLog (" %d - nRegs: %d\n", __LINE__, sym->nRegs); if(debugF) bitVectDebugOn(_G.regAssigned, debugF); @@ -2808,36 +2894,6 @@ packRegsForAssign (iCode * ic, eBBlock * ebp) // fprintf(stderr, "%s:%d symbol = %s\n", __FILE__, __LINE__, OP_SYMBOL( IC_RESULT(ic))->name); -#if 0 - /* if this is at an absolute address, then get the address. */ - if (SPEC_ABSA ( OP_SYM_ETYPE(IC_RESULT(ic))) ) { - if(PIC16_IS_CONFIG_ADDRESS( SPEC_ADDR ( OP_SYM_ETYPE(IC_RESULT(ic))))) { - debugLog (" %d - found config word declaration\n", __LINE__); - if(IS_VALOP(IC_RIGHT(ic))) { - debugLog (" setting config word to %x\n", - (int) floatFromVal (IC_RIGHT(ic)->operand.valOperand)); - - fprintf(stderr, "%s:%d setting config word to %x\n", __FILE__, __LINE__, - (int) floatFromVal (IC_RIGHT(ic)->operand.valOperand)); - - pic16_assignConfigWordValue( SPEC_ADDR ( OP_SYM_ETYPE(IC_RESULT(ic))), - (int) floatFromVal (IC_RIGHT(ic)->operand.valOperand)); - } - - - debugLog(" %d\n", __LINE__); - - /* remove the assignment from the iCode chain. */ - - remiCodeFromeBBlock (ebp, ic); - bitVectUnSetBit(OP_SYMBOL(IC_RESULT(ic))->defs,ic->key); - hTabDeleteItem (&iCodehTab, ic->key, ic, DELETE_ITEM, NULL); - - return 1; - - } - } -#endif debugLog(" %d - actuall processing\n", __LINE__ ); if (!IS_ITEMP (IC_RESULT (ic))) { @@ -2981,14 +3037,6 @@ packRegsForAssign (iCode * ic, eBBlock * ebp) if (OP_SYMBOL (IC_RESULT (ic))->onStack || OP_SYMBOL (IC_RESULT (ic))->iaccess) { - -#if 0 - /* clear the onStack flag, the port doesn't support it yet! FIXME */ - if(OP_SYMBOL(IC_RESULT(ic))->onStack) - OP_SYMBOL(IC_RESULT(ic))->onStack = 0; -#endif - - /* the operation has only one symbol operator then we can pack */ if ((IC_LEFT (dic) && !IS_SYMOP (IC_LEFT (dic))) || @@ -3085,12 +3133,6 @@ findAssignToSym (operand * op, iCode * ic) if ((ic->op == '+' || ic->op == '-') && OP_SYMBOL (IC_RIGHT (dic))->onStack) { - -#if 0 - if(OP_SYMBOL(IC_RESULT(ic))->onStack) - OP_SYMBOL(IC_RESULT(ic))->onStack = 0; -#endif - if (IC_RESULT (ic)->key != IC_RIGHT (dic)->key && IC_LEFT (ic)->key != IC_RIGHT (dic)->key && IC_RIGHT (ic)->key != IC_RIGHT (dic)->key) @@ -4108,9 +4150,10 @@ pic16_assignRegisters (eBBlock ** ebbs, int count) /* and serially allocate registers */ serialRegAssign (ebbs, count); -// debugLog ("ebbs after serialRegAssign:\n"); -// dumpEbbsToDebug (ebbs, count); - +#if 0 + debugLog ("ebbs after serialRegAssign:\n"); + dumpEbbsToDebug (ebbs, count); +#endif //pic16_freeAllRegs();