X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fpic%2Fpcode.c;h=3b2b7d91b14917ef41dd58cb28fe7291a35297f3;hb=ca540fbb3fd99e80cffe88514533fe1239d68106;hp=8713b457e1bac7b83ba8276dcf2a1f9c4257a297;hpb=fce3c2dbaa1f926fd28eb6678c5727103f763897;p=fw%2Fsdcc diff --git a/src/pic/pcode.c b/src/pic/pcode.c index 8713b457..3b2b7d91 100644 --- a/src/pic/pcode.c +++ b/src/pic/pcode.c @@ -50,12 +50,12 @@ peepCommand peepCommands[] = { // Eventually this will go into device dependent files: -pCodeOpReg pc_status = {{PO_STATUS, "_STATUS"}, -1, NULL,0,NULL}; +pCodeOpReg pc_status = {{PO_STATUS, "STATUS"}, -1, NULL,0,NULL}; pCodeOpReg pc_indf = {{PO_INDF, "INDF"}, -1, NULL,0,NULL}; pCodeOpReg pc_fsr = {{PO_FSR, "FSR"}, -1, NULL,0,NULL}; pCodeOpReg pc_intcon = {{PO_INTCON, ""}, -1, NULL,0,NULL}; pCodeOpReg pc_pcl = {{PO_PCL, "PCL"}, -1, NULL,0,NULL}; -pCodeOpReg pc_pclath = {{PO_PCLATH, "_PCLATH"}, -1, NULL,0,NULL}; +pCodeOpReg pc_pclath = {{PO_PCLATH, "PCLATH"}, -1, NULL,0,NULL}; pCodeOpReg pc_kzero = {{PO_GPR_REGISTER, "KZ"}, -1, NULL,0,NULL}; pCodeOpReg pc_wsave = {{PO_GPR_REGISTER, "WSAVE"}, -1, NULL,0,NULL}; @@ -75,13 +75,16 @@ static pBlock *pb_dead_pcodes = NULL; /* Hardcoded flags to change the behavior of the PIC port */ static int peepOptimizing = 1; /* run the peephole optimizer if nonzero */ static int functionInlining = 1; /* inline functions if nonzero */ +int debug_verbose = 0; /* Set true to inundate .asm file */ -static int GpCodeSequenceNumber = 1; +// static int GpCodeSequenceNumber = 1; int GpcFlowSeq = 1; extern void RemoveUnusedRegisters(void); +extern void RegsUnMapLiveRanges(void); extern void BuildFlowTree(pBlock *pb); -extern void pCodeRegOptimizeRegUsage(void); +extern void pCodeRegOptimizeRegUsage(int level); +extern int picIsInitialized(void); /****************************************************************/ /* Forward declarations */ @@ -102,7 +105,7 @@ static void pCodePrintLabel(FILE *of, pCode *pc); static void pCodePrintFunction(FILE *of, pCode *pc); static void pCodeOpPrint(FILE *of, pCodeOp *pcop); static char *get_op_from_instruction( pCodeInstruction *pcc); -char *get_op( pCodeOp *pcop,char *buff,int buf_size); +char *get_op( pCodeOp *pcop,char *buff,size_t buf_size); int pCodePeepMatchLine(pCodePeep *peepBlock, pCode *pcs, pCode *pcd); int pCodePeepMatchRule(pCode *pc); void pBlockStats(FILE *of, pBlock *pb); @@ -133,6 +136,7 @@ pCodeInstruction pciADDWF = { 2, // num ops 1,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, (PCC_W | PCC_REGISTER), // inCond (PCC_REGISTER | PCC_Z) // outCond @@ -154,6 +158,7 @@ pCodeInstruction pciADDFW = { 2, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, (PCC_W | PCC_REGISTER), // inCond (PCC_W | PCC_Z) // outCond @@ -175,6 +180,7 @@ pCodeInstruction pciADDLW = { 1, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 1, // literal operand POC_NOP, (PCC_W | PCC_LITERAL), // inCond (PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond @@ -196,6 +202,7 @@ pCodeInstruction pciANDLW = { 1, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 1, // literal operand POC_NOP, (PCC_W | PCC_LITERAL), // inCond (PCC_W | PCC_Z) // outCond @@ -217,6 +224,7 @@ pCodeInstruction pciANDWF = { 2, // num ops 1,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, (PCC_W | PCC_REGISTER), // inCond (PCC_REGISTER | PCC_Z) // outCond @@ -238,6 +246,7 @@ pCodeInstruction pciANDFW = { 2, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, (PCC_W | PCC_REGISTER), // inCond (PCC_W | PCC_Z) // outCond @@ -259,6 +268,7 @@ pCodeInstruction pciBCF = { 2, // num ops 1,1, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_BSF, (PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond PCC_REGISTER // outCond @@ -280,6 +290,7 @@ pCodeInstruction pciBSF = { 2, // num ops 1,1, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_BCF, (PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond (PCC_REGISTER | PCC_EXAMINE_PCOP) // outCond @@ -301,6 +312,7 @@ pCodeInstruction pciBTFSC = { 2, // num ops 0,1, // dest, bit instruction 1,1, // branch, skip + 0, // literal operand POC_BTFSS, (PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond PCC_EXAMINE_PCOP // outCond @@ -322,6 +334,7 @@ pCodeInstruction pciBTFSS = { 2, // num ops 0,1, // dest, bit instruction 1,1, // branch, skip + 0, // literal operand POC_BTFSC, (PCC_REGISTER | PCC_EXAMINE_PCOP), // inCond PCC_EXAMINE_PCOP // outCond @@ -343,6 +356,7 @@ pCodeInstruction pciCALL = { 1, // num ops 0,0, // dest, bit instruction 1,0, // branch, skip + 0, // literal operand POC_NOP, PCC_NONE, // inCond PCC_NONE // outCond @@ -364,6 +378,7 @@ pCodeInstruction pciCOMF = { 2, // num ops 1,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, PCC_REGISTER, // inCond PCC_REGISTER // outCond @@ -385,6 +400,7 @@ pCodeInstruction pciCOMFW = { 2, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, PCC_REGISTER, // inCond PCC_W // outCond @@ -406,6 +422,7 @@ pCodeInstruction pciCLRF = { 1, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, PCC_NONE, // inCond PCC_REGISTER // outCond @@ -427,11 +444,34 @@ pCodeInstruction pciCLRW = { 0, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, PCC_NONE, // inCond PCC_W // outCond }; +pCodeInstruction pciCLRWDT = { + {PC_OPCODE, NULL, NULL, 0, NULL, + // genericAnalyze, + genericDestruct, + genericPrint}, + POC_CLRWDT, + "CLRWDT", + NULL, // from branch + NULL, // to branch + NULL, // label + NULL, // operand + NULL, // flow block + NULL, // C source + 0, // num ops + 0,0, // dest, bit instruction + 0,0, // branch, skip + 0, // literal operand + POC_NOP, + PCC_NONE, // inCond + PCC_NONE // outCond +}; + pCodeInstruction pciDECF = { {PC_OPCODE, NULL, NULL, 0, NULL, // genericAnalyze, @@ -448,6 +488,7 @@ pCodeInstruction pciDECF = { 2, // num ops 1,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, PCC_REGISTER, // inCond PCC_REGISTER // outCond @@ -469,6 +510,7 @@ pCodeInstruction pciDECFW = { 2, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, PCC_REGISTER, // inCond PCC_W // outCond @@ -490,6 +532,7 @@ pCodeInstruction pciDECFSZ = { 2, // num ops 1,0, // dest, bit instruction 1,1, // branch, skip + 0, // literal operand POC_NOP, PCC_REGISTER, // inCond PCC_REGISTER // outCond @@ -511,6 +554,7 @@ pCodeInstruction pciDECFSZW = { 2, // num ops 0,0, // dest, bit instruction 1,1, // branch, skip + 0, // literal operand POC_NOP, PCC_REGISTER, // inCond PCC_W // outCond @@ -532,6 +576,7 @@ pCodeInstruction pciGOTO = { 1, // num ops 0,0, // dest, bit instruction 1,0, // branch, skip + 0, // literal operand POC_NOP, PCC_NONE, // inCond PCC_NONE // outCond @@ -553,6 +598,7 @@ pCodeInstruction pciINCF = { 2, // num ops 1,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, PCC_REGISTER, // inCond PCC_REGISTER // outCond @@ -574,6 +620,7 @@ pCodeInstruction pciINCFW = { 2, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, PCC_REGISTER, // inCond PCC_W // outCond @@ -595,6 +642,7 @@ pCodeInstruction pciINCFSZ = { 2, // num ops 1,0, // dest, bit instruction 1,1, // branch, skip + 0, // literal operand POC_NOP, PCC_REGISTER, // inCond PCC_REGISTER // outCond @@ -616,6 +664,7 @@ pCodeInstruction pciINCFSZW = { 2, // num ops 0,0, // dest, bit instruction 1,1, // branch, skip + 0, // literal operand POC_NOP, PCC_REGISTER, // inCond PCC_W // outCond @@ -637,6 +686,7 @@ pCodeInstruction pciIORWF = { 2, // num ops 1,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, (PCC_W | PCC_REGISTER), // inCond (PCC_REGISTER | PCC_Z) // outCond @@ -658,6 +708,7 @@ pCodeInstruction pciIORFW = { 2, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, (PCC_W | PCC_REGISTER), // inCond (PCC_W | PCC_Z) // outCond @@ -679,6 +730,7 @@ pCodeInstruction pciIORLW = { 1, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 1, // literal operand POC_NOP, (PCC_W | PCC_LITERAL), // inCond (PCC_W | PCC_Z) // outCond @@ -700,6 +752,7 @@ pCodeInstruction pciMOVF = { 2, // num ops 1,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, PCC_REGISTER, // inCond PCC_Z // outCond @@ -721,6 +774,7 @@ pCodeInstruction pciMOVFW = { 2, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, PCC_REGISTER, // inCond (PCC_W | PCC_Z) // outCond @@ -742,6 +796,7 @@ pCodeInstruction pciMOVWF = { 1, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, PCC_W, // inCond PCC_REGISTER // outCond @@ -749,7 +804,6 @@ pCodeInstruction pciMOVWF = { pCodeInstruction pciMOVLW = { {PC_OPCODE, NULL, NULL, 0, NULL, - // genericAnalyze, genericDestruct, genericPrint}, POC_MOVLW, @@ -763,6 +817,7 @@ pCodeInstruction pciMOVLW = { 1, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 1, // literal operand POC_NOP, (PCC_NONE | PCC_LITERAL), // inCond PCC_W // outCond @@ -783,6 +838,7 @@ pCodeInstruction pciNOP = { 0, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, PCC_NONE, // inCond PCC_NONE // outCond @@ -804,6 +860,7 @@ pCodeInstruction pciRETFIE = { 0, // num ops 0,0, // dest, bit instruction 1,0, // branch, skip + 0, // literal operand POC_NOP, PCC_NONE, // inCond PCC_NONE // outCond (not true... affects the GIE bit too) @@ -825,6 +882,7 @@ pCodeInstruction pciRETLW = { 1, // num ops 0,0, // dest, bit instruction 1,0, // branch, skip + 1, // literal operand POC_NOP, PCC_LITERAL, // inCond PCC_W // outCond @@ -846,6 +904,7 @@ pCodeInstruction pciRETURN = { 0, // num ops 0,0, // dest, bit instruction 1,0, // branch, skip + 0, // literal operand POC_NOP, PCC_NONE, // inCond PCC_NONE // outCond @@ -867,6 +926,7 @@ pCodeInstruction pciRLF = { 2, // num ops 1,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, (PCC_C | PCC_REGISTER), // inCond (PCC_REGISTER | PCC_Z | PCC_C | PCC_DC) // outCond @@ -888,6 +948,7 @@ pCodeInstruction pciRLFW = { 2, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, (PCC_C | PCC_REGISTER), // inCond (PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond @@ -909,6 +970,7 @@ pCodeInstruction pciRRF = { 2, // num ops 1,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, (PCC_C | PCC_REGISTER), // inCond (PCC_REGISTER | PCC_Z | PCC_C | PCC_DC) // outCond @@ -930,6 +992,7 @@ pCodeInstruction pciRRFW = { 2, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, (PCC_C | PCC_REGISTER), // inCond (PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond @@ -951,6 +1014,7 @@ pCodeInstruction pciSUBWF = { 2, // num ops 1,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, (PCC_W | PCC_REGISTER), // inCond (PCC_REGISTER | PCC_Z) // outCond @@ -972,6 +1036,7 @@ pCodeInstruction pciSUBFW = { 2, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, (PCC_W | PCC_REGISTER), // inCond (PCC_W | PCC_Z) // outCond @@ -993,6 +1058,7 @@ pCodeInstruction pciSUBLW = { 1, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 1, // literal operand POC_NOP, (PCC_W | PCC_LITERAL), // inCond (PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond @@ -1014,6 +1080,7 @@ pCodeInstruction pciSWAPF = { 2, // num ops 1,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, (PCC_REGISTER), // inCond (PCC_REGISTER) // outCond @@ -1035,6 +1102,7 @@ pCodeInstruction pciSWAPFW = { 2, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, (PCC_REGISTER), // inCond (PCC_W) // outCond @@ -1056,6 +1124,7 @@ pCodeInstruction pciTRIS = { 1, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, PCC_NONE, // inCond PCC_REGISTER // outCond @@ -1077,6 +1146,7 @@ pCodeInstruction pciXORWF = { 2, // num ops 1,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, (PCC_W | PCC_REGISTER), // inCond (PCC_REGISTER | PCC_Z) // outCond @@ -1098,6 +1168,7 @@ pCodeInstruction pciXORFW = { 2, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 0, // literal operand POC_NOP, (PCC_W | PCC_REGISTER), // inCond (PCC_W | PCC_Z) // outCond @@ -1119,6 +1190,7 @@ pCodeInstruction pciXORLW = { 1, // num ops 0,0, // dest, bit instruction 0,0, // branch, skip + 1, // literal operand POC_NOP, (PCC_W | PCC_LITERAL), // inCond (PCC_W | PCC_Z | PCC_C | PCC_DC) // outCond @@ -1128,10 +1200,8 @@ pCodeInstruction pciXORLW = { #define MAX_PIC14MNEMONICS 100 pCodeInstruction *pic14Mnemonics[MAX_PIC14MNEMONICS]; -/* This definition needs to be part of configure.in */ -// #define USE_VSNPRINTF -#ifdef USE_VSNPRINTF +#ifdef HAVE_VSNPRINTF // Alas, vsnprintf is not ANSI standard, and does not exist // on Solaris (and probably other non-Gnu flavored Unixes). @@ -1158,7 +1228,7 @@ void SAFE_snprintf(char **str, size_t *size, const char *format, ...) len = strlen(*str); if(len > *size) { fprintf(stderr,"WARNING, it looks like %s has overflowed\n",__FUNCTION__); - fprintf(stderr,"len = %d is > str size %d\n",len,*size); + fprintf(stderr,"len = %d is > str size %d\n",len,(int)*size); } *str += len; @@ -1166,7 +1236,7 @@ void SAFE_snprintf(char **str, size_t *size, const char *format, ...) } -#else // USE_VSNPRINTF +#else // HAVE_VSNPRINTF // This version is *not* safe, despite the name. @@ -1196,7 +1266,7 @@ void SAFE_snprintf(char **str, size_t *size, const char *format, ...) } -#endif // USE_VSNPRINTF +#endif // HAVE_VSNPRINTF extern void initStack(int base_address, int size); @@ -1215,9 +1285,9 @@ void pCodeInitRegisters(void) initStack(0xfff, 8); init_pic(port->processor); - pc_status.r = allocProcessorRegister(IDX_STATUS,"_STATUS", PO_STATUS, 0x80); + pc_status.r = allocProcessorRegister(IDX_STATUS,"STATUS", PO_STATUS, 0x80); pc_pcl.r = allocProcessorRegister(IDX_PCL,"PCL", PO_PCL, 0x80); - pc_pclath.r = allocProcessorRegister(IDX_PCLATH,"_PCLATH", PO_PCLATH, 0x80); + pc_pclath.r = allocProcessorRegister(IDX_PCLATH,"PCLATH", PO_PCLATH, 0x80); pc_fsr.r = allocProcessorRegister(IDX_FSR,"FSR", PO_FSR, 0x80); pc_indf.r = allocProcessorRegister(IDX_INDF,"INDF", PO_INDF, 0x80); pc_intcon.r = allocProcessorRegister(IDX_INTCON,"INTCON", PO_INTCON, 0x80); @@ -1293,6 +1363,7 @@ void pic14initMnemonics(void) pic14Mnemonics[POC_COMFW] = &pciCOMFW; pic14Mnemonics[POC_CLRF] = &pciCLRF; pic14Mnemonics[POC_CLRW] = &pciCLRW; + pic14Mnemonics[POC_CLRWDT] = &pciCLRWDT; pic14Mnemonics[POC_DECF] = &pciDECF; pic14Mnemonics[POC_DECFW] = &pciDECFW; pic14Mnemonics[POC_DECFSZ] = &pciDECFSZ; @@ -1356,7 +1427,7 @@ int getpCode(char *mnem,unsigned dest) while(pci) { if(STRCASECMP(pci->mnemonic, mnem) == 0) { - if((pci->num_ops <= 1) || (pci->isModReg == dest)) + if((pci->num_ops <= 1) || (pci->isModReg == dest) || (pci->isBitInst)) return(pci->op); } @@ -1496,6 +1567,7 @@ void copypCode(FILE *of, char dbName) if(getpBlock_dbName(pb) == dbName) { pBlockStats(of,pb); printpBlock(of,pb); + fprintf (of, "\n"); } } @@ -1514,7 +1586,7 @@ void pcode_test(void) char buffer[100]; /* create the file name */ - strcpy(buffer,srcFileName); + strcpy(buffer,dstFileName); strcat(buffer,".p"); if( !(pFile = fopen(buffer, "w" ))) { @@ -1762,19 +1834,22 @@ pCode *newpCodeFunction(char *mod,char *f) /*-----------------------------------------------------------------*/ /* newpCodeFlow */ /*-----------------------------------------------------------------*/ - void destructpCodeFlow(pCode *pc) { if(!pc || !isPCFL(pc)) return; - if(PCFL(pc)->uses) - free(PCFL(pc)->uses); /* if(PCFL(pc)->from) if(PCFL(pc)->to) */ + unlinkpCode(pc); + + deleteSet(&PCFL(pc)->registers); + deleteSet(&PCFL(pc)->from); + deleteSet(&PCFL(pc)->to); free(pc); + } pCode *newpCodeFlow(void ) @@ -1786,7 +1861,6 @@ pCode *newpCodeFlow(void ) pcflow->pc.type = PC_FLOW; pcflow->pc.prev = pcflow->pc.next = NULL; - //pcflow->pc.from = pcflow->pc.to = pcflow->pc.label = NULL; pcflow->pc.pb = NULL; // pcflow->pc.analyze = genericAnalyze; @@ -1795,9 +1869,6 @@ pCode *newpCodeFlow(void ) pcflow->pc.seq = GpcFlowSeq++; - pcflow->nuses = 7; - pcflow->uses = Safe_calloc(pcflow->nuses, sizeof(set *)); - pcflow->from = pcflow->to = NULL; pcflow->inCond = PCC_NONE; @@ -1907,7 +1978,7 @@ pCode *newpCodeLabel(char *name, int key) if(s) pcl->label = Safe_strdup(s); - + //fprintf(stderr,"newpCodeLabel: key=%d, name=%s\n",key, ((s)?s:"")); return ( (pCode *)pcl); } @@ -1983,6 +2054,7 @@ pCodeOp *newpCodeOpLabel(char *name, int key) ((pCodeOpLabel *)pcop)->key = key; + //fprintf(stderr,"newpCodeOpLabel: key=%d, name=%s\n",key,((s)?s:"")); return pcop; } @@ -2011,15 +2083,19 @@ pCodeOp *newpCodeOpLit(int lit) /*-----------------------------------------------------------------*/ /*-----------------------------------------------------------------*/ -pCodeOp *newpCodeOpImmd(char *name, int offset, int index, int code_space) +pCodeOp *newpCodeOpImmd(char *name, int offset, int index, int code_space, int is_func) { pCodeOp *pcop; pcop = Safe_calloc(1,sizeof(pCodeOpImmd) ); pcop->type = PO_IMMEDIATE; if(name) { - regs *r = dirregWithName(name); + regs *r = NULL; pcop->name = Safe_strdup(name); + + if(!is_func) + r = dirregWithName(name); + PCOI(pcop)->r = r; if(r) { //fprintf(stderr, " newpCodeOpImmd reg %s exists\n",name); @@ -2036,6 +2112,7 @@ pCodeOp *newpCodeOpImmd(char *name, int offset, int index, int code_space) PCOI(pcop)->index = index; PCOI(pcop)->offset = offset; PCOI(pcop)->_const = code_space; + PCOI(pcop)->_function = is_func; return pcop; } @@ -2082,6 +2159,9 @@ pCodeOp *newpCodeOpBit(char *s, int bit, int inBitSpace) PCORB(pcop)->bit = bit; PCORB(pcop)->inBitSpace = inBitSpace; + /* pCodeOpBit is derived from pCodeOpReg. We need to init this too */ + PCOR(pcop)->r = NULL; + PCOR(pcop)->rIdx = 0; return pcop; } @@ -2109,7 +2189,6 @@ pCodeOp *newpCodeOpReg(int rIdx) if(PCOR(pcop)->r) PCOR(pcop)->rIdx = PCOR(pcop)->r->rIdx; - //fprintf(stderr, "newpcodeOpReg - rIdx = %d\n", PCOR(pcop)->r->rIdx); } pcop->type = PCOR(pcop)->r->pc_type; @@ -2154,6 +2233,14 @@ pCodeOp *newpCodeOp(char *name, PIC_OPTYPE type) pcop = newpCodeOpReg(-1); break; + case PO_GPR_POINTER: + case PO_GPR_REGISTER: + if(name) + pcop = newpCodeOpRegFromStr(name); + else + pcop = newpCodeOpReg(-1); + break; + default: pcop = Safe_calloc(1,sizeof(pCodeOp) ); pcop->type = type; @@ -2223,16 +2310,22 @@ void pCodeReadCodeTable(void) /*-----------------------------------------------------------------*/ void addpCode2pBlock(pBlock *pb, pCode *pc) { + + if(!pc) + return; + if(!pb->pcHead) { /* If this is the first pcode to be added to a block that * was initialized with a NULL pcode, then go ahead and * make this pcode the head and tail */ pb->pcHead = pb->pcTail = pc; } else { + // if(pb->pcTail) pb->pcTail->next = pc; + pc->prev = pb->pcTail; - //pc->next = NULL; pc->pb = pb; + pb->pcTail = pc; } } @@ -2404,7 +2497,7 @@ void pBlockRegs(FILE *of, pBlock *pb) /*-----------------------------------------------------------------*/ /*-----------------------------------------------------------------*/ -char *get_op(pCodeOp *pcop,char *buffer, int size) +char *get_op(pCodeOp *pcop,char *buffer, size_t size) { regs *r; static char b[50]; @@ -2425,7 +2518,8 @@ char *get_op(pCodeOp *pcop,char *buffer, int size) SAFE_snprintf(&buffer,&size,"%s",PCOR(pcop)->r->name); return buffer; } - return PCOR(pcop)->r->name; + //return PCOR(pcop)->r->name; + return pcop->name; break; case PO_GPR_TEMP: r = pic14_regWithIdx(PCOR(pcop)->r->rIdx); @@ -2444,10 +2538,19 @@ char *get_op(pCodeOp *pcop,char *buffer, int size) if(PCOI(pcop)->_const) { if( PCOI(pcop)->offset && PCOI(pcop)->offset<4) { - SAFE_snprintf(&s,&size,"(((%s+%d) >> %d)&0xff)", - pcop->name, - PCOI(pcop)->index, - 8 * PCOI(pcop)->offset ); + switch(PCOI(pcop)->offset) { + case 0: + SAFE_snprintf(&s,&size,"low %s",pcop->name); + break; + case 1: + SAFE_snprintf(&s,&size,"high %s",pcop->name); + break; + default: + SAFE_snprintf(&s,&size,"(((%s+%d) >> %d)&0xff)", + pcop->name, + PCOI(pcop)->index, + 8 * PCOI(pcop)->offset ); + } } else SAFE_snprintf(&s,&size,"LOW(%s+%d)",pcop->name,PCOI(pcop)->index); } else { @@ -2456,8 +2559,18 @@ char *get_op(pCodeOp *pcop,char *buffer, int size) SAFE_snprintf(&s,&size,"(%s + %d)", pcop->name, PCOI(pcop)->index ); - } else - SAFE_snprintf(&s,&size,"%s",pcop->name); + } else { + switch(PCOI(pcop)->offset) { + case 0: + SAFE_snprintf(&s,&size,"%s",pcop->name); + break; + case 1: + SAFE_snprintf(&s,&size,"high %s",pcop->name); + break; + default: + SAFE_snprintf(&s,&size,"(%s >> %d)&0xff",pcop->name, 8*PCOI(pcop)->offset); + } + } } return buffer; @@ -2497,8 +2610,11 @@ static char *get_op_from_instruction( pCodeInstruction *pcc) if(pcc ) return get_op(pcc->pcop,NULL,0); - + + /* gcc 3.2: warning: concatenation of string literals with __FUNCTION__ is deprecated return ("ERROR Null: "__FUNCTION__); + */ + return ("ERROR Null: get_op_from_instruction"); } @@ -2512,7 +2628,7 @@ static void pCodeOpPrint(FILE *of, pCodeOp *pcop) /*-----------------------------------------------------------------*/ /*-----------------------------------------------------------------*/ -char *pCode2str(char *str, int size, pCode *pc) +char *pCode2str(char *str, size_t size, pCode *pc) { char *s = str; @@ -2631,9 +2747,11 @@ static void genericPrint(FILE *of, pCode *pc) fprintf(of,"%s",str); /* Debug */ - fprintf(of, "\t;key=%03x",pc->seq); - if(PCI(pc)->pcflow) - fprintf(of,",flow seq=%03x",PCI(pc)->pcflow->pc.seq); + if(debug_verbose) { + fprintf(of, "\t;key=%03x",pc->seq); + if(PCI(pc)->pcflow) + fprintf(of,",flow seq=%03x",PCI(pc)->pcflow->pc.seq); + } } #if 0 { @@ -2675,7 +2793,13 @@ static void genericPrint(FILE *of, pCode *pc) break; case PC_FLOW: - fprintf(of,";<>Start of new flow, seq=%d\n",pc->seq); + if(debug_verbose) { + fprintf(of,";<>Start of new flow, seq=0x%x",pc->seq); + if(PCFL(pc)->ancestor) + fprintf(of," ancestor = 0x%x", PCODE(PCFL(pc)->ancestor)->seq); + fprintf(of,"\n"); + + } break; case PC_CSOURCE: @@ -3150,7 +3274,9 @@ regs * getRegFromInstruction(pCode *pc) switch(PCI(pc)->pcop->type) { case PO_INDF: case PO_FSR: - return typeRegWithIdx (PCOR(PCI(pc)->pcop)->rIdx, REG_SFR, 0); + return PCOR(PCI(pc)->pcop)->r; + + // return typeRegWithIdx (PCOR(PCI(pc)->pcop)->rIdx, REG_SFR, 0); case PO_BIT: case PO_GPR_TEMP: @@ -3255,7 +3381,8 @@ void AnalyzepBlock(pBlock *pb) void InsertpFlow(pCode *pc, pCode **pflow) { - PCFL(*pflow)->end = pc; + if(*pflow) + PCFL(*pflow)->end = pc; if(!pc || !pc->next) return; @@ -3276,7 +3403,7 @@ void BuildFlow(pBlock *pb) { pCode *pc; pCode *last_pci=NULL; - pCode *pflow; + pCode *pflow=NULL; int seq = 0; if(!pb) @@ -3285,11 +3412,13 @@ void BuildFlow(pBlock *pb) //fprintf (stderr,"build flow start seq %d ",GpcFlowSeq); /* Insert a pCodeFlow object at the beginning of a pBlock */ - pflow = newpCodeFlow(); /* Create a new Flow object */ - pflow->next = pb->pcHead; /* Make the current head the next object */ - pb->pcHead->prev = pflow; /* let the current head point back to the flow object */ - pb->pcHead = pflow; /* Make the Flow object the head */ - pflow->pb = pb; + InsertpFlow(pb->pcHead, &pflow); + + //pflow = newpCodeFlow(); /* Create a new Flow object */ + //pflow->next = pb->pcHead; /* Make the current head the next object */ + //pb->pcHead->prev = pflow; /* let the current head point back to the flow object */ + //pb->pcHead = pflow; /* Make the Flow object the head */ + //pflow->pb = pb; for( pc = findNextInstruction(pb->pcHead); pc != NULL; @@ -3330,14 +3459,22 @@ void BuildFlow(pBlock *pb) InsertpFlow(pc, &pflow); seq = 0; - } else if (checkLabel(pc)) { //(PCI_HAS_LABEL(pc)) { + } else if (checkLabel(pc)) { /* This instruction marks the beginning of a * new flow segment */ pc->seq = 0; - seq = 1; - InsertpFlow(findPrevInstruction(pc->prev), &pflow); + seq = 1; + + /* If the previous pCode is not a flow object, then + * insert a new flow object. (This check prevents + * two consecutive flow objects from being insert in + * the case where a skip instruction preceeds an + * instruction containing a label.) */ + + if(last_pci && (PCI(last_pci)->pcflow == PCFL(pflow))) + InsertpFlow(findPrevInstruction(pc->prev), &pflow); PCI(pc)->pcflow = PCFL(pflow); @@ -3347,7 +3484,8 @@ void BuildFlow(pBlock *pb) } //fprintf (stderr,",end seq %d",GpcFlowSeq); - PCFL(pflow)->end = pb->pcTail; + if(pflow) + PCFL(pflow)->end = pb->pcTail; } /*-------------------------------------------------------------------*/ @@ -3359,27 +3497,31 @@ void BuildFlow(pBlock *pb) /*-----------------------------------------------------------------*/ void unBuildFlow(pBlock *pb) { - pCode *pc; + pCode *pc,*pcnext; if(!pb) return; pc = pb->pcHead; + while(pc) { - pCode *pcn = pc->next; + pcnext = pc->next; if(isPCI(pc)) { + pc->seq = 0; - PCI(pc)->pcflow = NULL; - pc = pcn; - } else if(isPCFL(pc)) { - unlinkpCode(pc); + if(PCI(pc)->pcflow) { + //free(PCI(pc)->pcflow); + PCI(pc)->pcflow = NULL; + } + + } else if(isPCFL(pc) ) pc->destruct(pc); - } else - pc = pcn; + pc = pcnext; } + } /*-----------------------------------------------------------------*/ @@ -3566,8 +3708,15 @@ void LinkFlow_pCode(pCodeInstruction *from, pCodeInstruction *to) } -/*-----------------------------------------------------------------*/ -/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------* + * void LinkFlow(pBlock *pb) + * + * In BuildFlow, the PIC code has been partitioned into contiguous + * non-branching segments. In LinkFlow, we determine the execution + * order of these segments. For example, if one of the segments ends + * with a skip, then we know that there are two possible flow segments + * to which control may be passed. + *-----------------------------------------------------------------*/ void LinkFlow(pBlock *pb) { pCode *pc=NULL; @@ -3608,7 +3757,7 @@ void LinkFlow(pBlock *pb) //pc->print(stderr,pc); if(!(pcol && isPCOLAB(pcol))) { - if((PCI(pc)->op != POC_RETLW) && (PCI(pc)->op != POC_RETURN) && (PCI(pc)->op != POC_CALL)) { + if((PCI(pc)->op != POC_RETLW) && (PCI(pc)->op != POC_RETURN) && (PCI(pc)->op != POC_CALL) && (PCI(pc)->op != POC_RETFIE) ) { pc->print(stderr,pc); fprintf(stderr, "ERROR: %s, branch instruction doesn't have label\n",__FUNCTION__); } @@ -3618,7 +3767,9 @@ void LinkFlow(pBlock *pb) if( (pct = findLabelinpBlock(pb,pcol)) != NULL) LinkFlow_pCode(PCI(pc),PCI(pct)); else - fprintf(stderr, "ERROR: %s, couldn't find label\n",__FUNCTION__); + fprintf(stderr, "ERROR: %s, couldn't find label. key=%d,lab=%s\n", + __FUNCTION__,pcol->key,((PCOP(pcol)->name)?PCOP(pcol)->name:"-")); + //fprintf(stderr,"newpCodeOpLabel: key=%d, name=%s\n",key,((s)?s:"")); continue; } @@ -3642,6 +3793,8 @@ void LinkFlow(pBlock *pb) } } +/*-----------------------------------------------------------------*/ +/*-----------------------------------------------------------------*/ /*-----------------------------------------------------------------*/ /*-----------------------------------------------------------------*/ @@ -3750,7 +3903,7 @@ void BanksUsedFlow(pBlock *pb) /*-----------------------------------------------------------------*/ /*-----------------------------------------------------------------*/ -void insertBankSwitch(pCode *pc, int Set_Clear, int RP_BankBit) +void insertBankSwitch(int position, pCode *pc, int Set_Clear, int RP_BankBit) { pCode *new_pc; @@ -3763,7 +3916,15 @@ void insertBankSwitch(pCode *pc, int Set_Clear, int RP_BankBit) new_pc = newpCode((Set_Clear ? POC_BSF : POC_BCF), popCopyGPR2Bit(PCOP(&pc_status),RP_BankBit)); - pCodeInsertAfter(pc->prev, new_pc); + if(position) { + /* insert the bank switch after this pc instruction */ + pCode *pcnext = findNextInstruction(pc); + pCodeInsertAfter(pc, new_pc); + if(pcnext) + pc = pcnext; + + } else + pCodeInsertAfter(pc->prev, new_pc); /* Move the label, if there is one */ @@ -3793,7 +3954,6 @@ void FixRegisterBankingInFlow(pCodeFlow *pcfl, int cur_bank) while(isPCinFlow(pc,PCODE(pcfl))) { - reg = getRegFromInstruction(pc); #if 0 if(reg) { @@ -3803,46 +3963,41 @@ void FixRegisterBankingInFlow(pCodeFlow *pcfl, int cur_bank) } #endif - if(reg && REG_BANK(reg)!=cur_bank) { + if( ( (reg && REG_BANK(reg)!=cur_bank) || + ((PCI(pc)->op == POC_CALL) && (cur_bank != 0) ) ) && + (!isPCI_LIT(pc)) ){ + /* Examine the instruction before this one to make sure it is * not a skip type instruction */ pcprev = findPrevpCode(pc->prev, PC_OPCODE); + if(!pcprev || (pcprev && !isPCI_SKIP(pcprev))) { - int b = cur_bank ^ REG_BANK(reg); + int b; + int reg_bank; + + reg_bank = (reg) ? REG_BANK(reg) : 0; + + b = cur_bank ^ reg_bank; //fprintf(stderr, "Cool! can switch banks\n"); - cur_bank = REG_BANK(reg); + cur_bank = reg_bank; switch(b & 3) { case 0: break; case 1: - insertBankSwitch(pc, cur_bank&1, PIC_RP0_BIT); + insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT); break; case 2: - insertBankSwitch(pc, cur_bank&2, PIC_RP1_BIT); - insertBankSwitch(pc, cur_bank&2, PIC_RP1_BIT); + insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT); + insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT); break; case 3: if(cur_bank & 3) { - insertBankSwitch(pc, cur_bank&1, PIC_RP0_BIT); - insertBankSwitch(pc, cur_bank&2, PIC_RP1_BIT); + insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT); + insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT); } else - insertBankSwitch(pc, -1, -1); + insertBankSwitch(0, pc, -1, -1); break; - /* - new_pc = newpCode(((cur_bank&1) ? POC_BSF : POC_BCF), - popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT)); - pCodeInsertAfter(pc->prev, new_pc); - if(PCI(pc)->label) { - PCI(new_pc)->label = PCI(pc)->label; - PCI(pc)->label = NULL; - } - */ - /* - new_pc = newpCode(((cur_bank&1) ? POC_BCF : POC_BSF), - popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT)); - pCodeInsertAfter(pc, new_pc); - */ } @@ -4138,6 +4293,9 @@ int OptimizepBlock(pBlock *pb) */ pc = findNextInstruction(pb->pcHead); + if(!pc) + return 0; + pcprev = pc->prev; do { @@ -4185,6 +4343,8 @@ pCode * findInstructionUsingLabel(pCodeLabel *pcl, pCode *pcs) void exchangeLabels(pCodeLabel *pcl, pCode *pc) { + char *s=NULL; + if(isPCI(pc) && (PCI(pc)->pcop) && (PCI(pc)->pcop->type == PO_LABEL)) { @@ -4195,9 +4355,19 @@ void exchangeLabels(pCodeLabel *pcl, pCode *pc) if(pcol->pcop.name) free(pcol->pcop.name); - sprintf(buffer,"_%05d_DS_",pcl->key); - - pcol->pcop.name = Safe_strdup(buffer); + /* If the key is negative, then we (probably) have a label to + * a function and the name is already defined */ + + if(pcl->key>0) + sprintf(s=buffer,"_%05d_DS_",pcl->key); + else + s = pcl->label; + + //sprintf(buffer,"_%05d_DS_",pcl->key); + if(!s) { + fprintf(stderr, "ERROR %s:%d function label is null\n",__FUNCTION__,__LINE__); + } + pcol->pcop.name = Safe_strdup(s); pcol->key = pcl->key; //pc->print(stderr,pc); @@ -4298,7 +4468,11 @@ void pBlockMergeLabels(pBlock *pb) /* Now loop through the pBlock and merge the labels with the opcodes */ - for(pc = pb->pcHead; pc; pc = pc->next) { + pc = pb->pcHead; + // for(pc = pb->pcHead; pc; pc = pc->next) { + + while(pc) { + pCode *pcn = pc->next; if(pc->type == PC_LABEL) { @@ -4306,8 +4480,6 @@ void pBlockMergeLabels(pBlock *pb) //fprintf(stderr,"Checking label key = %d\n",PCL(pc)->key); if((pcnext = findNextInstruction(pc) )) { - pCode *pcn = pc->next; - // Unlink the pCode label from it's pCode chain unlinkpCode(pc); @@ -4323,10 +4495,7 @@ void pBlockMergeLabels(pBlock *pb) pbr->pc = pc; pbr->next = NULL; - PCI(pcnext)->label = pBranchAppend(PCI(pcnext)->label,pbr); - - pc = pcn; } else { fprintf(stderr, "WARNING: couldn't associate label %s with an instruction\n",PCL(pc)->label); @@ -4336,18 +4505,15 @@ void pBlockMergeLabels(pBlock *pb) /* merge the source line symbolic info into the next instruction */ if((pcnext = findNextInstruction(pc) )) { - pCode *pcn = pc->next; - // Unlink the pCode label from it's pCode chain unlinkpCode(pc); PCI(pcnext)->cline = PCCS(pc); //fprintf(stderr, "merging CSRC\n"); //genericPrint(stderr,pcnext); - pc = pcn; } } - + pc = pcn; } pBlockRemoveUnusedLabels(pb); @@ -4421,11 +4587,10 @@ void FixRegisterBanking(pBlock *pb) { pCode *pc=NULL; pCode *pcprev=NULL; - pCode *new_pc; int cur_bank; regs *reg; - // return; + if(!pb) return; @@ -4449,63 +4614,151 @@ void FixRegisterBanking(pBlock *pb) //genericPrint(stderr, pc); reg = getRegFromInstruction(pc); - #if 0 +#if 0 if(reg) { fprintf(stderr, " %s ",reg->name); - fprintf(stderr, "addr = 0x%03x, bank = %d\n",reg->address,REG_BANK(reg)); + fprintf(stderr, "addr = 0x%03x, bank = %d, bit=%d\n", + reg->address,REG_BANK(reg),reg->isBitField); } - #endif - if(reg && REG_BANK(reg)!=cur_bank) { +#endif + + if( ( (reg && REG_BANK(reg)!=cur_bank) || + ((PCI(pc)->op == POC_CALL) && (cur_bank != 0) ) ) && + (!isPCI_LIT(pc)) ){ + + /* Examine the instruction before this one to make sure it is * not a skip type instruction */ pcprev = findPrevpCode(pc->prev, PC_OPCODE); - if(!pcprev || (pcprev && !isPCI_SKIP(pcprev))) { - int b = cur_bank ^ REG_BANK(reg); - //fprintf(stderr, "Cool! can switch banks\n"); - cur_bank = REG_BANK(reg); - if(b & 1) { - new_pc = newpCode(((cur_bank&1) ? POC_BSF : POC_BCF), - popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT)); - pCodeInsertAfter(pc->prev, new_pc); - if(PCI(pc)->label) { - PCI(new_pc)->label = PCI(pc)->label; - PCI(pc)->label = NULL; - } - /* - new_pc = newpCode(((cur_bank&1) ? POC_BCF : POC_BSF), - popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT)); - pCodeInsertAfter(pc, new_pc); - */ + if(!pcprev || (pcprev && !isPCI_SKIP(pcprev))) { + int b; + int reg_bank; + + reg_bank = (reg) ? REG_BANK(reg) : 0; + + b = cur_bank ^ reg_bank; + + cur_bank = reg_bank; + switch(b & 3) { + case 0: + break; + case 1: + insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT); + break; + case 2: + insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT); + insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT); + break; + case 3: + if(cur_bank & 3) { + insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT); + insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT); + } else + insertBankSwitch(0, pc, -1, -1); + break; } - } else { + }else { //fprintf(stderr, "Bummer can't switch banks\n"); ; } } + + pcprev = pc; + } - pcprev = pc; pc = pc->next; // } while(pc && !(isPCFL(pc))); }while (pc); - if(pcprev && cur_bank) { - /* Brute force - make sure that we point to bank 0 at the - * end of each flow block */ - new_pc = newpCode(POC_BCF, - popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT)); - pCodeInsertAfter(pcprev, new_pc); - cur_bank = 0; + if(pcprev && cur_bank) { + + int pos = 1; /* Assume that the bank swithc instruction(s) + * are inserted after this instruction */ + + if((PCI(pcprev)->op == POC_RETLW) || + (PCI(pcprev)->op == POC_RETURN) || + (PCI(pcprev)->op == POC_RETFIE)) { + + /* oops, a RETURN - we need to switch banks *before* the RETURN */ + + pos = 0; + + } + + /* Brute force - make sure that we point to bank 0 at the + * end of each flow block */ + + switch(cur_bank & 3) { + case 0: + break; + case 1: + insertBankSwitch(pos, pcprev, 0, PIC_RP0_BIT); + break; + case 2: + insertBankSwitch(pos, pcprev, 0, PIC_RP1_BIT); + insertBankSwitch(pos, pcprev, 0, PIC_RP1_BIT); + break; + case 3: + insertBankSwitch(pos, pcprev, -1, -1); + break; + } +/* + new_pc = newpCode(POC_BCF, + popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT)); + pCodeInsertAfter(pcprev, new_pc); +*/ + cur_bank = 0; + //fprintf(stderr, "Brute force switch\n"); + } } + + + +#if 0 + if(reg && REG_BANK(reg)!=cur_bank) { + //fprintf(stderr,"need to switch banks\n"); + /* Examine the instruction before this one to make sure it is + * not a skip type instruction */ + pcprev = findPrevpCode(pc->prev, PC_OPCODE); + if(!pcprev || (pcprev && !isPCI_SKIP(pcprev))) { + int b = cur_bank ^ REG_BANK(reg); + + cur_bank = REG_BANK(reg); + + switch(b & 3) { + case 0: + break; + case 1: + insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT); + break; + case 2: + insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT); + insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT); + break; + case 3: + if(cur_bank & 3) { + insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT); + insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT); + } else + insertBankSwitch(0, pc, -1, -1); + break; + + } +#endif + + + + void pBlockDestruct(pBlock *pb) { @@ -4560,12 +4813,18 @@ void mergepBlocks(char dbName) } /*-----------------------------------------------------------------*/ -/* AnalyzeBanking - Called after the memory addresses have been */ -/* assigned to the registers. */ +/* AnalyzeFlow - Examine the flow of the code and optimize */ /* */ +/* level 0 == minimal optimization */ +/* optimize registers that are used only by two instructions */ +/* level 1 == maximal optimization */ +/* optimize by looking at pairs of instructions that use the */ +/* register. */ /*-----------------------------------------------------------------*/ -void AnalyzeBanking(void) + +void AnalyzeFlow(int level) { + static int times_called=0; pBlock *pb; @@ -4573,6 +4832,18 @@ void AnalyzeBanking(void) return; + /* if this is not the first time this function has been called, + then clean up old flow information */ + if(times_called++) { + for(pb = the_pFile->pbHead; pb; pb = pb->next) + unBuildFlow(pb); + + RegsUnMapLiveRanges(); + + } + + GpcFlowSeq = 1; + /* Phase 2 - Flow Analysis - Register Banking * * In this phase, the individual flow blocks are examined @@ -4608,19 +4879,10 @@ void AnalyzeBanking(void) * In this phase, the individual flow blocks are examined * to determine their order of excution. */ - /* + for(pb = the_pFile->pbHead; pb; pb = pb->next) BuildFlowTree(pb); - */ - /* Phase x - Flow Analysis - Used Banks - * - * In this phase, the individual flow blocks are examined - * to determine the Register Banks they use - */ - - for(pb = the_pFile->pbHead; pb; pb = pb->next) - BanksUsedFlow(pb); /* Phase x - Flow Analysis - Used Banks * @@ -4638,10 +4900,11 @@ void AnalyzeBanking(void) RemoveUnusedRegisters(); // for(pb = the_pFile->pbHead; pb; pb = pb->next) - pCodeRegOptimizeRegUsage(); + pCodeRegOptimizeRegUsage(level); OptimizepCode('*'); + /* for(pb = the_pFile->pbHead; pb; pb = pb->next) DumpFlow(pb); @@ -4656,6 +4919,7 @@ void AnalyzeBanking(void) FillFlow(PCFL(pcflow)); } } + /* for(pb = the_pFile->pbHead; pb; pb = pb->next) { pCode *pcflow; @@ -4669,6 +4933,41 @@ void AnalyzeBanking(void) */ } +/*-----------------------------------------------------------------*/ +/* AnalyzeBanking - Called after the memory addresses have been */ +/* assigned to the registers. */ +/* */ +/*-----------------------------------------------------------------*/ + +void AnalyzeBanking(void) +{ + pBlock *pb; + + if(!picIsInitialized()) { + fprintf(stderr,"Temporary ERROR: at the moment you have to use\n"); + fprintf(stderr,"an include file create by inc2h.pl. See SDCC source:\n"); + fprintf(stderr,"support/scripts/inc2h.pl\n"); + fprintf(stderr,"this is a nuisance bug that will be fixed shortly\n"); + + exit(1); + } + + /* Phase x - Flow Analysis - Used Banks + * + * In this phase, the individual flow blocks are examined + * to determine the Register Banks they use + */ + + AnalyzeFlow(0); + AnalyzeFlow(1); + + for(pb = the_pFile->pbHead; pb; pb = pb->next) + BanksUsedFlow(pb); + for(pb = the_pFile->pbHead; pb; pb = pb->next) + FixRegisterBanking(pb); + +} + /*-----------------------------------------------------------------*/ /* buildCallTree - look at the flow and extract all of the calls */ /* */