X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fpic%2Fpcode.c;h=066ad6335f129a99699af531e381b724e37bb5b4;hb=01c5178e097126448f1fd794cdc93e933a6e7dc7;hp=6aad570383c1467926b7fc7e309d2098d41bbf22;hpb=42ac194ab811f6198733c7fd82b07de8da31831f;p=fw%2Fsdcc

diff --git a/src/pic/pcode.c b/src/pic/pcode.c
index 6aad5703..066ad633 100644
--- a/src/pic/pcode.c
+++ b/src/pic/pcode.c
@@ -50,12 +50,12 @@ peepCommand peepCommands[] = {
 
 
 // Eventually this will go into device dependent files:
-pCodeOpReg pc_status    = {{PO_STATUS,  "STATUS"}, -1, NULL,0,NULL};
+pCodeOpReg pc_status    = {{PO_STATUS,  "_STATUS"}, -1, NULL,0,NULL};
 pCodeOpReg pc_indf      = {{PO_INDF,    "INDF"}, -1, NULL,0,NULL};
 pCodeOpReg pc_fsr       = {{PO_FSR,     "FSR"}, -1, NULL,0,NULL};
 pCodeOpReg pc_intcon    = {{PO_INTCON,  ""}, -1, NULL,0,NULL};
 pCodeOpReg pc_pcl       = {{PO_PCL,     "PCL"}, -1, NULL,0,NULL};
-pCodeOpReg pc_pclath    = {{PO_PCLATH,  "PCLATH"}, -1, NULL,0,NULL};
+pCodeOpReg pc_pclath    = {{PO_PCLATH,  "_PCLATH"}, -1, NULL,0,NULL};
 
 pCodeOpReg pc_kzero     = {{PO_GPR_REGISTER,  "KZ"}, -1, NULL,0,NULL};
 pCodeOpReg pc_wsave     = {{PO_GPR_REGISTER,  "WSAVE"}, -1, NULL,0,NULL};
@@ -75,13 +75,16 @@ static pBlock *pb_dead_pcodes = NULL;
 /* Hardcoded flags to change the behavior of the PIC port */
 static int peepOptimizing = 1;        /* run the peephole optimizer if nonzero */
 static int functionInlining = 1;      /* inline functions if nonzero */
+int debug_verbose = 0;                /* Set true to inundate .asm file */
 
 static int GpCodeSequenceNumber = 1;
 int GpcFlowSeq = 1;
 
 extern void RemoveUnusedRegisters(void);
+extern void RegsUnMapLiveRanges(void);
 extern void BuildFlowTree(pBlock *pb);
-extern void pCodeRegOptimizeRegUsage(void);
+extern void pCodeRegOptimizeRegUsage(int level);
+extern int picIsInitialized(void);
 
 /****************************************************************/
 /*                      Forward declarations                    */
@@ -432,6 +435,27 @@ pCodeInstruction pciCLRW = {
   PCC_W  // outCond
 };
 
+pCodeInstruction pciCLRWDT = {
+  {PC_OPCODE, NULL, NULL, 0, NULL, 
+   //   genericAnalyze,
+   genericDestruct,
+   genericPrint},
+  POC_CLRWDT,
+  "CLRWDT",
+  NULL, // from branch
+  NULL, // to branch
+  NULL, // label
+  NULL, // operand
+  NULL, // flow block
+  NULL, // C source 
+  0,    // num ops
+  0,0,  // dest, bit instruction
+  0,0,  // branch, skip
+  POC_NOP,
+  PCC_NONE, // inCond
+  PCC_NONE  // outCond
+};
+
 pCodeInstruction pciDECF = {
   {PC_OPCODE, NULL, NULL, 0, NULL, 
    //   genericAnalyze,
@@ -1206,13 +1230,18 @@ extern void init_pic(char *);
 
 void  pCodeInitRegisters(void)
 {
+  static int initialized=0;
+
+  if(initialized)
+    return;
+  initialized = 1;
 
   initStack(0xfff, 8);
   init_pic(port->processor);
 
-  pc_status.r = allocProcessorRegister(IDX_STATUS,"STATUS", PO_STATUS, 0x80);
+  pc_status.r = allocProcessorRegister(IDX_STATUS,"_STATUS", PO_STATUS, 0x80);
   pc_pcl.r = allocProcessorRegister(IDX_PCL,"PCL", PO_PCL, 0x80);
-  pc_pclath.r = allocProcessorRegister(IDX_PCLATH,"PCLATH", PO_PCLATH, 0x80);
+  pc_pclath.r = allocProcessorRegister(IDX_PCLATH,"_PCLATH", PO_PCLATH, 0x80);
   pc_fsr.r = allocProcessorRegister(IDX_FSR,"FSR", PO_FSR, 0x80);
   pc_indf.r = allocProcessorRegister(IDX_INDF,"INDF", PO_INDF, 0x80);
   pc_intcon.r = allocProcessorRegister(IDX_INTCON,"INTCON", PO_INTCON, 0x80);
@@ -1288,6 +1317,7 @@ void pic14initMnemonics(void)
   pic14Mnemonics[POC_COMFW] = &pciCOMFW;
   pic14Mnemonics[POC_CLRF] = &pciCLRF;
   pic14Mnemonics[POC_CLRW] = &pciCLRW;
+  pic14Mnemonics[POC_CLRWDT] = &pciCLRWDT;
   pic14Mnemonics[POC_DECF] = &pciDECF;
   pic14Mnemonics[POC_DECFW] = &pciDECFW;
   pic14Mnemonics[POC_DECFSZ] = &pciDECFSZ;
@@ -1351,7 +1381,7 @@ int getpCode(char *mnem,unsigned dest)
   while(pci) {
 
     if(STRCASECMP(pci->mnemonic, mnem) == 0) {
-      if((pci->num_ops <= 1) || (pci->isModReg == dest))
+      if((pci->num_ops <= 1) || (pci->isModReg == dest) || (pci->isBitInst))
 	return(pci->op);
     }
 
@@ -1757,19 +1787,22 @@ pCode *newpCodeFunction(char *mod,char *f)
 /*-----------------------------------------------------------------*/
 /* newpCodeFlow                                                    */
 /*-----------------------------------------------------------------*/
-
 void destructpCodeFlow(pCode *pc)
 {
   if(!pc || !isPCFL(pc))
     return;
 
-  if(PCFL(pc)->uses)
-    free(PCFL(pc)->uses);
 /*
   if(PCFL(pc)->from)
   if(PCFL(pc)->to)
 */
+  unlinkpCode(pc);
+
+  deleteSet(&PCFL(pc)->registers);
+  deleteSet(&PCFL(pc)->from);
+  deleteSet(&PCFL(pc)->to);
   free(pc);
+
 }
 
 pCode *newpCodeFlow(void )
@@ -1781,7 +1814,6 @@ pCode *newpCodeFlow(void )
 
   pcflow->pc.type = PC_FLOW;
   pcflow->pc.prev = pcflow->pc.next = NULL;
-  //pcflow->pc.from = pcflow->pc.to = pcflow->pc.label = NULL;
   pcflow->pc.pb = NULL;
 
   //  pcflow->pc.analyze = genericAnalyze;
@@ -1790,9 +1822,6 @@ pCode *newpCodeFlow(void )
 
   pcflow->pc.seq = GpcFlowSeq++;
 
-  pcflow->nuses = 7;
-  pcflow->uses = Safe_calloc(pcflow->nuses, sizeof(set *));
-
   pcflow->from = pcflow->to = NULL;
 
   pcflow->inCond = PCC_NONE;
@@ -2077,6 +2106,9 @@ pCodeOp *newpCodeOpBit(char *s, int bit, int inBitSpace)
   PCORB(pcop)->bit = bit;
   PCORB(pcop)->inBitSpace = inBitSpace;
 
+  /* pCodeOpBit is derived from pCodeOpReg. We need to init this too */
+  PCOR(pcop)->r = NULL;
+  PCOR(pcop)->rIdx = 0;
   return pcop;
 }
 
@@ -2104,7 +2136,6 @@ pCodeOp *newpCodeOpReg(int rIdx)
 
     if(PCOR(pcop)->r)
       PCOR(pcop)->rIdx = PCOR(pcop)->r->rIdx;
-    //fprintf(stderr, "newpcodeOpReg - rIdx = %d\n", PCOR(pcop)->r->rIdx);
   }
 
   pcop->type = PCOR(pcop)->r->pc_type;
@@ -2149,6 +2180,13 @@ pCodeOp *newpCodeOp(char *name, PIC_OPTYPE type)
     pcop = newpCodeOpReg(-1);
     break;
 
+  case PO_GPR_REGISTER:
+    if(name)
+      pcop = newpCodeOpRegFromStr(name);
+    else
+      pcop = newpCodeOpReg(-1);
+    break;
+
   default:
     pcop = Safe_calloc(1,sizeof(pCodeOp) );
     pcop->type = type;
@@ -2218,16 +2256,22 @@ void pCodeReadCodeTable(void)
 /*-----------------------------------------------------------------*/
 void addpCode2pBlock(pBlock *pb, pCode *pc)
 {
+
+  if(!pc)
+    return;
+
   if(!pb->pcHead) {
     /* If this is the first pcode to be added to a block that
      * was initialized with a NULL pcode, then go ahead and
      * make this pcode the head and tail */
     pb->pcHead  = pb->pcTail = pc;
   } else {
+    //    if(pb->pcTail)
     pb->pcTail->next = pc;
+
     pc->prev = pb->pcTail;
-    //pc->next = NULL;
     pc->pb = pb;
+
     pb->pcTail = pc;
   }
 }
@@ -2626,9 +2670,11 @@ static void genericPrint(FILE *of, pCode *pc)
       fprintf(of,"%s",str);
 
       /* Debug */
-      fprintf(of, "\t;key=%03x",pc->seq);
-      if(PCI(pc)->pcflow)
-	fprintf(of,",flow seq=%03x",PCI(pc)->pcflow->pc.seq);
+      if(debug_verbose) {
+	fprintf(of, "\t;key=%03x",pc->seq);
+	if(PCI(pc)->pcflow)
+	  fprintf(of,",flow seq=%03x",PCI(pc)->pcflow->pc.seq);
+      }
     }
 #if 0
     {
@@ -2670,7 +2716,13 @@ static void genericPrint(FILE *of, pCode *pc)
     break;
 
   case PC_FLOW:
-    fprintf(of,";<>Start of new flow, seq=%d\n",pc->seq);
+    if(debug_verbose) {
+      fprintf(of,";<>Start of new flow, seq=0x%x",pc->seq);
+      if(PCFL(pc)->ancestor)
+	fprintf(of," ancestor = 0x%x", PCODE(PCFL(pc)->ancestor)->seq);
+      fprintf(of,"\n");
+
+    }
     break;
 
   case PC_CSOURCE:
@@ -2779,13 +2831,16 @@ static void unlinkpCodeFromBranch(pCode *pcl , pCode *pc)
 
 /*-----------------------------------------------------------------*/
 /*-----------------------------------------------------------------*/
-static pBranch * pBranchAppend(pBranch *h, pBranch *n)
+pBranch * pBranchAppend(pBranch *h, pBranch *n)
 {
   pBranch *b;
 
   if(!h)
     return n;
 
+  if(h == n)
+    return n;
+
   b = h;
   while(b->next)
     b = b->next;
@@ -3142,7 +3197,9 @@ regs * getRegFromInstruction(pCode *pc)
   switch(PCI(pc)->pcop->type) {
   case PO_INDF:
   case PO_FSR:
-    return typeRegWithIdx (PCOR(PCI(pc)->pcop)->rIdx, REG_SFR, 0);
+    return PCOR(PCI(pc)->pcop)->r;
+
+    //    return typeRegWithIdx (PCOR(PCI(pc)->pcop)->rIdx, REG_SFR, 0);
 
   case PO_BIT:
   case PO_GPR_TEMP:
@@ -3247,7 +3304,8 @@ void AnalyzepBlock(pBlock *pb)
 
 void InsertpFlow(pCode *pc, pCode **pflow)
 {
-  PCFL(*pflow)->end = pc;
+  if(*pflow)
+    PCFL(*pflow)->end = pc;
 
   if(!pc || !pc->next)
     return;
@@ -3268,7 +3326,7 @@ void BuildFlow(pBlock *pb)
 {
   pCode *pc;
   pCode *last_pci=NULL;
-  pCode *pflow;
+  pCode *pflow=NULL;
   int seq = 0;
 
   if(!pb)
@@ -3277,11 +3335,13 @@ void BuildFlow(pBlock *pb)
   //fprintf (stderr,"build flow start seq %d  ",GpcFlowSeq);
   /* Insert a pCodeFlow object at the beginning of a pBlock */
 
-  pflow = newpCodeFlow();    /* Create a new Flow object */
-  pflow->next = pb->pcHead;  /* Make the current head the next object */
-  pb->pcHead->prev = pflow;  /* let the current head point back to the flow object */
-  pb->pcHead = pflow;        /* Make the Flow object the head */
-  pflow->pb = pb;
+  InsertpFlow(pb->pcHead, &pflow);
+
+  //pflow = newpCodeFlow();    /* Create a new Flow object */
+  //pflow->next = pb->pcHead;  /* Make the current head the next object */
+  //pb->pcHead->prev = pflow;  /* let the current head point back to the flow object */
+  //pb->pcHead = pflow;        /* Make the Flow object the head */
+  //pflow->pb = pb;
 
   for( pc = findNextInstruction(pb->pcHead);
        pc != NULL;
@@ -3322,14 +3382,22 @@ void BuildFlow(pBlock *pb)
       InsertpFlow(pc, &pflow);
       seq = 0;
 
-    } else if (checkLabel(pc)) { //(PCI_HAS_LABEL(pc)) {
+    } else if (checkLabel(pc)) { 
 
       /* This instruction marks the beginning of a
        * new flow segment */
 
       pc->seq = 0;
-      seq = 1; 
-      InsertpFlow(findPrevInstruction(pc->prev), &pflow);
+      seq = 1;
+
+      /* If the previous pCode is not a flow object, then 
+       * insert a new flow object. (This check prevents 
+       * two consecutive flow objects from being insert in
+       * the case where a skip instruction preceeds an
+       * instruction containing a label.) */
+
+      if(last_pci && (PCI(last_pci)->pcflow == PCFL(pflow)))
+	InsertpFlow(findPrevInstruction(pc->prev), &pflow);
 
       PCI(pc)->pcflow = PCFL(pflow);
       
@@ -3339,7 +3407,8 @@ void BuildFlow(pBlock *pb)
   }
 
   //fprintf (stderr,",end seq %d",GpcFlowSeq);
-  PCFL(pflow)->end = pb->pcTail;
+  if(pflow)
+    PCFL(pflow)->end = pb->pcTail;
 }
 
 /*-------------------------------------------------------------------*/
@@ -3351,27 +3420,31 @@ void BuildFlow(pBlock *pb)
 /*-----------------------------------------------------------------*/
 void unBuildFlow(pBlock *pb)
 {
-  pCode *pc;
+  pCode *pc,*pcnext;
 
   if(!pb)
     return;
 
   pc = pb->pcHead;
+
   while(pc) {
-    pCode *pcn = pc->next;
+    pcnext = pc->next;
 
     if(isPCI(pc)) {
+
       pc->seq = 0;
-      PCI(pc)->pcflow = NULL;
-      pc = pcn;
-    } else if(isPCFL(pc)) {
-      unlinkpCode(pc);
+      if(PCI(pc)->pcflow) {
+	//free(PCI(pc)->pcflow);
+	PCI(pc)->pcflow = NULL;
+      }
+
+    } else if(isPCFL(pc) )
       pc->destruct(pc);
-    } else 
-      pc = pcn;
 
+    pc = pcnext;
   }
 
+
 }
 
 /*-----------------------------------------------------------------*/
@@ -3558,8 +3631,15 @@ void LinkFlow_pCode(pCodeInstruction *from, pCodeInstruction *to)
 
 }
 
-/*-----------------------------------------------------------------*/
-/*-----------------------------------------------------------------*/
+/*-----------------------------------------------------------------*
+ * void LinkFlow(pBlock *pb)
+ *
+ * In BuildFlow, the PIC code has been partitioned into contiguous
+ * non-branching segments. In LinkFlow, we determine the execution
+ * order of these segments. For example, if one of the segments ends
+ * with a skip, then we know that there are two possible flow segments
+ * to which control may be passed.
+ *-----------------------------------------------------------------*/
 void LinkFlow(pBlock *pb)
 {
   pCode *pc=NULL;
@@ -3600,7 +3680,7 @@ void LinkFlow(pBlock *pb)
       //pc->print(stderr,pc);
 
       if(!(pcol && isPCOLAB(pcol))) {
-	if((PCI(pc)->op != POC_RETURN) && (PCI(pc)->op != POC_CALL)) {
+	if((PCI(pc)->op != POC_RETLW) && (PCI(pc)->op != POC_RETURN) && (PCI(pc)->op != POC_CALL) && (PCI(pc)->op != POC_RETFIE) ) {
 	  pc->print(stderr,pc);
 	  fprintf(stderr, "ERROR: %s, branch instruction doesn't have label\n",__FUNCTION__);
 	}
@@ -3634,6 +3714,8 @@ void LinkFlow(pBlock *pb)
     
   }
 }
+/*-----------------------------------------------------------------*/
+/*-----------------------------------------------------------------*/
 
 /*-----------------------------------------------------------------*/
 /*-----------------------------------------------------------------*/
@@ -3742,7 +3824,7 @@ void BanksUsedFlow(pBlock *pb)
 
 /*-----------------------------------------------------------------*/
 /*-----------------------------------------------------------------*/
-void insertBankSwitch(pCode *pc, int Set_Clear, int RP_BankBit)
+void insertBankSwitch(int position, pCode *pc, int Set_Clear, int RP_BankBit)
 {
   pCode *new_pc;
 
@@ -3755,7 +3837,15 @@ void insertBankSwitch(pCode *pc, int Set_Clear, int RP_BankBit)
     new_pc = newpCode((Set_Clear ? POC_BSF : POC_BCF),
 		      popCopyGPR2Bit(PCOP(&pc_status),RP_BankBit));
 
-  pCodeInsertAfter(pc->prev, new_pc);
+  if(position) {
+    /* insert the bank switch after this pc instruction */
+    pCode *pcnext = findNextInstruction(pc);
+    pCodeInsertAfter(pc, new_pc);
+    if(pcnext)
+      pc = pcnext;
+
+  } else
+    pCodeInsertAfter(pc->prev, new_pc);
 
   /* Move the label, if there is one */
 
@@ -3808,18 +3898,18 @@ void FixRegisterBankingInFlow(pCodeFlow *pcfl, int cur_bank)
 	case 0:
 	  break;
 	case 1:
-	  insertBankSwitch(pc, cur_bank&1, PIC_RP0_BIT);
+	  insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT);
 	  break;
 	case 2:
-	  insertBankSwitch(pc, cur_bank&2, PIC_RP1_BIT);
-	  insertBankSwitch(pc, cur_bank&2, PIC_RP1_BIT);
+	  insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT);
+	  insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT);
 	  break;
 	case 3:
 	  if(cur_bank & 3) {
-	    insertBankSwitch(pc, cur_bank&1, PIC_RP0_BIT);
-	    insertBankSwitch(pc, cur_bank&2, PIC_RP1_BIT);
+	    insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT);
+	    insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT);
 	  } else
-	    insertBankSwitch(pc, -1, -1);
+	    insertBankSwitch(0, pc, -1, -1);
 	  break;
 	  /*
 	    new_pc = newpCode(((cur_bank&1) ? POC_BSF : POC_BCF),
@@ -4130,6 +4220,9 @@ int OptimizepBlock(pBlock *pb)
 */
 
   pc = findNextInstruction(pb->pcHead);
+  if(!pc)
+    return 0;
+
   pcprev = pc->prev;
   do {
 
@@ -4290,7 +4383,11 @@ void pBlockMergeLabels(pBlock *pb)
 
   /* Now loop through the pBlock and merge the labels with the opcodes */
 
-  for(pc = pb->pcHead; pc; pc = pc->next) {
+  pc = pb->pcHead;
+  //  for(pc = pb->pcHead; pc; pc = pc->next) {
+
+  while(pc) {
+    pCode *pcn = pc->next;
 
     if(pc->type == PC_LABEL) {
 
@@ -4298,8 +4395,6 @@ void pBlockMergeLabels(pBlock *pb)
       //fprintf(stderr,"Checking label key = %d\n",PCL(pc)->key);
       if((pcnext = findNextInstruction(pc) )) {
 
-	pCode *pcn = pc->next;
-
 	// Unlink the pCode label from it's pCode chain
 	unlinkpCode(pc);
 	
@@ -4315,10 +4410,7 @@ void pBlockMergeLabels(pBlock *pb)
 	pbr->pc = pc;
 	pbr->next = NULL;
 
-
 	PCI(pcnext)->label = pBranchAppend(PCI(pcnext)->label,pbr);
-      
-	pc = pcn;
 
       } else {
 	fprintf(stderr, "WARNING: couldn't associate label %s with an instruction\n",PCL(pc)->label);
@@ -4328,18 +4420,15 @@ void pBlockMergeLabels(pBlock *pb)
       /* merge the source line symbolic info into the next instruction */
       if((pcnext = findNextInstruction(pc) )) {
 
-	pCode *pcn = pc->next;
-
 	// Unlink the pCode label from it's pCode chain
 	unlinkpCode(pc);
 	PCI(pcnext)->cline = PCCS(pc);
 	//fprintf(stderr, "merging CSRC\n");
 	//genericPrint(stderr,pcnext);
-	pc = pcn;
       }
 
     }
-
+    pc = pcn;
   }
   pBlockRemoveUnusedLabels(pb);
 
@@ -4413,11 +4502,10 @@ void FixRegisterBanking(pBlock *pb)
 {
   pCode *pc=NULL;
   pCode *pcprev=NULL;
-  pCode *new_pc;
 
   int cur_bank;
   regs *reg;
-  //  return;
+
   if(!pb)
     return;
 
@@ -4441,60 +4529,102 @@ void FixRegisterBanking(pBlock *pb)
 	//genericPrint(stderr, pc);
 
 	reg = getRegFromInstruction(pc);
-	#if 0
+#if 0
 	if(reg) {
 	  fprintf(stderr, "  %s  ",reg->name);
-	  fprintf(stderr, "addr = 0x%03x, bank = %d\n",reg->address,REG_BANK(reg));
+	  fprintf(stderr, "addr = 0x%03x, bank = %d, bit=%d\n",
+		  reg->address,REG_BANK(reg),reg->isBitField);
 
 	}
-	#endif
+#endif
 	if(reg && REG_BANK(reg)!=cur_bank) {
+	  //fprintf(stderr,"need to switch banks\n");
 	  /* Examine the instruction before this one to make sure it is
 	   * not a skip type instruction */
 	  pcprev = findPrevpCode(pc->prev, PC_OPCODE);
 	  if(!pcprev || (pcprev && !isPCI_SKIP(pcprev))) {
 	    int b = cur_bank ^ REG_BANK(reg);
 
-	    //fprintf(stderr, "Cool! can switch banks\n");
 	    cur_bank = REG_BANK(reg);
-	    if(b & 1) {
-	      new_pc = newpCode(((cur_bank&1) ? POC_BSF : POC_BCF),
-				popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT));
-	      pCodeInsertAfter(pc->prev, new_pc);
-	      if(PCI(pc)->label) { 
-		PCI(new_pc)->label = PCI(pc)->label;
-		PCI(pc)->label = NULL;
-	      }
-	      /*
-		new_pc = newpCode(((cur_bank&1) ? POC_BCF : POC_BSF),
-		popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT));
-		pCodeInsertAfter(pc, new_pc);
-	      */
+
+	    switch(b & 3) {
+	    case 0:
+	      break;
+	    case 1:
+	      insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT);
+	      break;
+	    case 2:
+	      insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT);
+	      insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT);
+	      break;
+	    case 3:
+	      if(cur_bank & 3) {
+		insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT);
+		insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT);
+	      } else
+		insertBankSwitch(0, pc, -1, -1);
+	      break;
 
 	    }
 
-	  } else {
+
+	  }else {
 	    //fprintf(stderr, "Bummer can't switch banks\n");
 	    ;
 	  }
 	}
+
+	pcprev = pc;
+
       }
 
-      pcprev = pc;
       pc = pc->next;
       // } while(pc && !(isPCFL(pc))); 
 
 
   }while (pc);
 
-    if(pcprev && cur_bank) {
-      /* Brute force - make sure that we point to bank 0 at the
-       * end of each flow block */
-      new_pc = newpCode(POC_BCF,
-			popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT));
-      pCodeInsertAfter(pcprev, new_pc);
-      cur_bank = 0;
+  if(pcprev && cur_bank) {
+
+    int pos = 1;  /* Assume that the bank swithc instruction(s)
+		   * are inserted after this instruction */
+
+    if((PCI(pcprev)->op == POC_RETLW) || 
+       (PCI(pcprev)->op == POC_RETURN) || 
+       (PCI(pcprev)->op == POC_RETFIE)) {
+
+      /* oops, a RETURN - we need to switch banks *before* the RETURN */
+
+      pos = 0;
+
+    } 
+	    
+    /* Brute force - make sure that we point to bank 0 at the
+     * end of each flow block */
+
+    switch(cur_bank & 3) {
+    case 0:
+      break;
+    case 1:
+      insertBankSwitch(pos, pcprev, 0, PIC_RP0_BIT);
+      break;
+    case 2:
+      insertBankSwitch(pos, pcprev, 0, PIC_RP1_BIT);
+      insertBankSwitch(pos, pcprev, 0, PIC_RP1_BIT);
+      break;
+    case 3:
+      insertBankSwitch(pos, pcprev, -1, -1);
+      break;
+
     }
+/*
+    new_pc = newpCode(POC_BCF,
+		      popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT));
+    pCodeInsertAfter(pcprev, new_pc);
+*/
+    cur_bank = 0;
+    //fprintf(stderr, "Brute force switch\n");
+  }
 
 }
 
@@ -4552,12 +4682,18 @@ void mergepBlocks(char dbName)
 }
 
 /*-----------------------------------------------------------------*/
-/* AnalyzeBanking - Called after the memory addresses have been    */
-/*                  assigned to the registers.                     */
+/* AnalyzeFlow - Examine the flow of the code and optimize         */
 /*                                                                 */
+/* level 0 == minimal optimization                                 */
+/*   optimize registers that are used only by two instructions     */
+/* level 1 == maximal optimization                                 */
+/*   optimize by looking at pairs of instructions that use the     */
+/*   register.                                                     */
 /*-----------------------------------------------------------------*/
-void AnalyzeBanking(void)
+
+void AnalyzeFlow(int level)
 {
+  static int times_called=0;
 
   pBlock *pb;
 
@@ -4565,6 +4701,18 @@ void AnalyzeBanking(void)
     return;
 
 
+  /* if this is not the first time this function has been called,
+     then clean up old flow information */
+  if(times_called++) {
+    for(pb = the_pFile->pbHead; pb; pb = pb->next)
+      unBuildFlow(pb);
+
+    RegsUnMapLiveRanges();
+
+  }
+
+  GpcFlowSeq = 1;
+
   /* Phase 2 - Flow Analysis - Register Banking
    *
    * In this phase, the individual flow blocks are examined
@@ -4600,19 +4748,10 @@ void AnalyzeBanking(void)
    * In this phase, the individual flow blocks are examined
    * to determine their order of excution.
    */
-  /*
+
   for(pb = the_pFile->pbHead; pb; pb = pb->next)
     BuildFlowTree(pb);
-  */
-
-  /* Phase x - Flow Analysis - Used Banks
-   *
-   * In this phase, the individual flow blocks are examined
-   * to determine the Register Banks they use
-   */
 
-  for(pb = the_pFile->pbHead; pb; pb = pb->next)
-    BanksUsedFlow(pb);
 
   /* Phase x - Flow Analysis - Used Banks
    *
@@ -4630,10 +4769,11 @@ void AnalyzeBanking(void)
   RemoveUnusedRegisters();
 
   //  for(pb = the_pFile->pbHead; pb; pb = pb->next)
-  pCodeRegOptimizeRegUsage();
+  pCodeRegOptimizeRegUsage(level);
 
   OptimizepCode('*');
 
+
 /*
   for(pb = the_pFile->pbHead; pb; pb = pb->next)
     DumpFlow(pb);
@@ -4648,6 +4788,7 @@ void AnalyzeBanking(void)
       FillFlow(PCFL(pcflow));
     }
   }
+
 /*
   for(pb = the_pFile->pbHead; pb; pb = pb->next) {
     pCode *pcflow;
@@ -4661,6 +4802,41 @@ void AnalyzeBanking(void)
 */
 }
 
+/*-----------------------------------------------------------------*/
+/* AnalyzeBanking - Called after the memory addresses have been    */
+/*                  assigned to the registers.                     */
+/*                                                                 */
+/*-----------------------------------------------------------------*/
+
+void AnalyzeBanking(void)
+{
+  pBlock  *pb;
+
+  if(!picIsInitialized()) {
+    fprintf(stderr,"Temporary ERROR: at the moment you have to use\n");
+    fprintf(stderr,"an include file create by inc2h.pl. See SDCC source:\n");
+    fprintf(stderr,"support/scripts/inc2h.pl\n");
+    fprintf(stderr,"this is a nuisance bug that will be fixed shortly\n");
+
+    exit(1);
+  }
+
+  /* Phase x - Flow Analysis - Used Banks
+   *
+   * In this phase, the individual flow blocks are examined
+   * to determine the Register Banks they use
+   */
+
+  AnalyzeFlow(0);
+  AnalyzeFlow(1);
+
+  for(pb = the_pFile->pbHead; pb; pb = pb->next)
+    BanksUsedFlow(pb);
+  for(pb = the_pFile->pbHead; pb; pb = pb->next)
+    FixRegisterBanking(pb);
+
+}
+
 /*-----------------------------------------------------------------*/
 /* buildCallTree - look at the flow and extract all of the calls   */
 /*                                                                 */