X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fmcs51%2Fmain.c;h=9a18499e38f42c04ad68dcf4dcb851f600af7c34;hb=270fddefec4feae4a03851b3fd06e8ea759fbd62;hp=738a7d98eebc4c8b71fedbfb3bc92fde686bff50;hpb=f0d3e26f7b91a687dbf34c7e3f56be5f371e1a1e;p=fw%2Fsdcc

diff --git a/src/mcs51/main.c b/src/mcs51/main.c
index 738a7d98..9a18499e 100644
--- a/src/mcs51/main.c
+++ b/src/mcs51/main.c
@@ -9,7 +9,6 @@
 #include "ralloc.h"
 #include "gen.h"
 #include "../SDCCutil.h"
-extern const char *preArgv[128];	/* pre-processor arguments  */
 
 static char _defaultRules[] =
 {
@@ -105,6 +104,10 @@ _mcs51_parseOptions (int *pargc, char **argv, int *i)
 static void
 _mcs51_finaliseOptions (void)
 {
+  if (options.noXinitOpt) {
+    port->genXINIT=0;
+  }
+
   if (options.model == MODEL_LARGE) {
       port->mem.default_local_map = xdata;
       port->mem.default_globl_map = xdata;
@@ -116,7 +119,7 @@ _mcs51_finaliseOptions (void)
     }
 
   if (options.parms_in_bank1) {
-      addToList (preArgv, "-DSDCC_PARMS_IN_BANK1");
+      addSet(&preArgvSet, Safe_strdup("-DSDCC_PARMS_IN_BANK1"));
   }
 }
 
@@ -150,18 +153,35 @@ _mcs51_genIVT (FILE * of, symbol ** interrupts, int maxInterrupts)
   return FALSE;
 }
 
+/* Generate code to clear XSEG and idata memory. 
+   This clears XSEG, DSEG, BSEG, OSEG, SSEG */
+static void _mcs51_genRAMCLEAR (FILE * of) {
+  fprintf (of, ";	_mcs51_genRAMCLEAR() start\n");
+  fprintf (of, "	mov	r0,#l_XSEG\n");
+  fprintf (of, "	mov	a,r0\n");
+  fprintf (of, "	orl	a,#(l_XSEG >> 8)\n");
+  fprintf (of, "	jz	00005$\n");
+  fprintf (of, "	mov	r1,#((l_XSEG + 255) >> 8)\n");
+  fprintf (of, "	mov	dptr,#s_XSEG\n");
+  fprintf (of, "	clr     a\n");
+  fprintf (of, "00004$:	movx	@dptr,a\n");
+  fprintf (of, "	inc	dptr\n");
+  fprintf (of, "	djnz	r0,00004$\n");
+  fprintf (of, "	djnz	r1,00004$\n");
+  /* r0 is zero now. Clearing 256 byte assuming 128 byte devices don't mind */
+  fprintf (of, "00005$:	mov	@r0,a\n");   
+  fprintf (of, "	djnz	r0,00005$\n");
+  fprintf (of, ";	_mcs51_genRAMCLEAR() end\n");
+}
+
 /* Generate code to copy XINIT to XISEG */
 static void _mcs51_genXINIT (FILE * of) {
   fprintf (of, ";	_mcs51_genXINIT() start\n");
-  fprintf (of, "	mov	a,#l_XINIT\n");
-  fprintf (of, "	orl	a,#l_XINIT>>8\n");
+  fprintf (of, "	mov	r1,#l_XINIT\n");
+  fprintf (of, "	mov	a,r1\n");
+  fprintf (of, "	orl	a,#(l_XINIT >> 8)\n");
   fprintf (of, "	jz	00003$\n");
-  fprintf (of, "	mov	a,#s_XINIT\n");
-  fprintf (of, "	add	a,#l_XINIT\n");
-  fprintf (of, "	mov	r1,a\n");
-  fprintf (of, "	mov	a,#s_XINIT>>8\n");
-  fprintf (of, "	addc	a,#l_XINIT>>8\n");
-  fprintf (of, "	mov	r2,a\n");
+  fprintf (of, "	mov	r2,#((l_XINIT+255) >> 8)\n");
   fprintf (of, "	mov	dptr,#s_XINIT\n");
   fprintf (of, "	mov	r0,#s_XISEG\n");
   fprintf (of, "	mov	p2,#(s_XISEG >> 8)\n");
@@ -172,13 +192,13 @@ static void _mcs51_genXINIT (FILE * of) {
   fprintf (of, "	inc	r0\n");
   fprintf (of, "	cjne	r0,#0,00002$\n");
   fprintf (of, "	inc	p2\n");
-  fprintf (of, "00002$:	mov	a,dpl\n");
-  fprintf (of, "	cjne	a,ar1,00001$\n");
-  fprintf (of, "	mov	a,dph\n");
-  fprintf (of, "	cjne	a,ar2,00001$\n");
+  fprintf (of, "00002$:	djnz	r1,00001$\n");
+  fprintf (of, "	djnz	r2,00001$\n");
   fprintf (of, "	mov	p2,#0xFF\n");
   fprintf (of, "00003$:\n");
   fprintf (of, ";	_mcs51_genXINIT() end\n");
+  
+  if (!getenv("SDCC_NOGENRAMCLEAR")) _mcs51_genRAMCLEAR (of);
 }
 
 
@@ -204,6 +224,30 @@ static bool cseCostEstimation (iCode *ic, iCode *pdic)
     return 1;
 }
 
+/* Indicate which extended bit operations this port supports */
+static bool
+hasExtBitOp (int op, int size)
+{
+  if (op == RRC
+      || op == RLC
+      || op == GETHBIT
+      || (op == SWAP && size <= 2)
+     )
+    return TRUE;
+  else
+    return FALSE;
+}
+
+/* Indicate the expense of an access to an output storage class */
+static int
+oclsExpense (struct memmap *oclass)
+{
+  if (IN_FARSPACE(oclass))
+    return 1;
+    
+  return 0;
+}
+
 /** $1 is always the basename.
     $2 is always the output file.
     $3 varies
@@ -212,13 +256,13 @@ static bool cseCostEstimation (iCode *ic, iCode *pdic)
 */
 static const char *_linkCmd[] =
 {
-  "{bindir}{sep}aslink", "-nf", "$1", NULL
+  "aslink", "-nf", "\"$1\"", NULL
 };
 
 /* $3 is replaced by assembler.debug_opts resp. port->assembler.plain_opts */
 static const char *_asmCmd[] =
 {
-  "asx8051", "$l", "$3", "$1.asm", NULL
+  "asx8051", "$l", "$3", "\"$1.asm\"", NULL
 };
 
 /* Globals */
@@ -229,6 +273,7 @@ PORT mcs51_port =
   "MCU 8051",			/* Target name */
   NULL,				/* Processor name */
   {
+    glue,
     TRUE,			/* Emit glue around main */
     MODEL_SMALL | MODEL_LARGE,
     MODEL_SMALL
@@ -246,7 +291,8 @@ PORT mcs51_port =
     _linkCmd,
     NULL,
     NULL,
-    ".rel"
+    ".rel",
+    1
   },
   {
     _defaultRules
@@ -274,8 +320,9 @@ PORT mcs51_port =
     NULL,
     1
   },
+  { NULL, NULL },
   {
-    +1, 1, 4, 1, 1, 0
+    +1, 0, 4, 1, 1, 0
   },
     /* mcs51 has an 8 bit mul */
   {
@@ -299,7 +346,10 @@ PORT mcs51_port =
   NULL,
   NULL,
   NULL,
+  hasExtBitOp,			/* hasExtBitOp */
+  oclsExpense,			/* oclsExpense */
   FALSE,
+  TRUE,				/* little endian */
   0,				/* leave lt */
   0,				/* leave gt */
   1,				/* transform <= to ! > */