X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fmcs51%2Fmain.c;h=8027833e64bbdc682c2fe4044e3e5a76723ce4ff;hb=c587c89fcd82090e36de4267efe3c6099576ab52;hp=e3788b230c73686258b1aa9457993fa8bfaa595c;hpb=116a1bfc169e441ed10267f1b0fe8a2336b6dc78;p=fw%2Fsdcc

diff --git a/src/mcs51/main.c b/src/mcs51/main.c
index e3788b23..8027833e 100644
--- a/src/mcs51/main.c
+++ b/src/mcs51/main.c
@@ -8,6 +8,7 @@
 #include "main.h"
 #include "ralloc.h"
 #include "gen.h"
+#include "dbuf_string.h"
 #include "../SDCCutil.h"
 
 static char _defaultRules[] =
@@ -52,7 +53,7 @@ static char *_mcs51_keywords[] =
 
 void mcs51_assignRegisters (ebbIndex *);
 
-static int regParmFlg = 0;      /* determine if we can register a parameter */
+static int regParmFlg = 0;      /* determine if we can register a parameter     */
 static int regBitParmFlg = 0;   /* determine if we can register a bit parameter */
 
 static void
@@ -122,14 +123,27 @@ _mcs51_finaliseOptions (void)
     port->genXINIT=0;
   }
 
-  if (options.model == MODEL_LARGE) {
+  switch (options.model)
+    {
+    case MODEL_SMALL:
+      port->mem.default_local_map = data;
+      port->mem.default_globl_map = data;
+      port->s.gptr_size = 3;
+      break;
+    case MODEL_MEDIUM:
+      port->mem.default_local_map = pdata;
+      port->mem.default_globl_map = pdata;
+      port->s.gptr_size = 3;
+      break;
+    case MODEL_LARGE:
       port->mem.default_local_map = xdata;
       port->mem.default_globl_map = xdata;
-    }
-  else
-    {
+      port->s.gptr_size = 3;
+      break;
+    default:
       port->mem.default_local_map = data;
       port->mem.default_globl_map = data;
+      break;
     }
 
   if (options.parms_in_bank1) {
@@ -162,26 +176,26 @@ _mcs51_genAssemblerPreamble (FILE * of)
 
 /* Generate interrupt vector table. */
 static int
-_mcs51_genIVT (FILE * of, symbol ** interrupts, int maxInterrupts)
+_mcs51_genIVT (struct dbuf_s * oBuf, symbol ** interrupts, int maxInterrupts)
 {
   int i;
 
-  fprintf (of, "\tljmp\t__sdcc_gsinit_startup\n");
+  dbuf_printf (oBuf, "\tljmp\t__sdcc_gsinit_startup\n");
 
   /* now for the other interrupts */
   for (i = 0; i < maxInterrupts; i++)
     {
       if (interrupts[i])
         {
-          fprintf (of, "\tljmp\t%s\n", interrupts[i]->rname);
+          dbuf_printf (oBuf, "\tljmp\t%s\n", interrupts[i]->rname);
           if ( i != maxInterrupts - 1 )
-            fprintf (of, "\t.ds\t5\n");
+            dbuf_printf (oBuf, "\t.ds\t5\n");
         }
       else
         {
-          fprintf (of, "\treti\n");
+          dbuf_printf (oBuf, "\treti\n");
           if ( i != maxInterrupts - 1 )
-            fprintf (of, "\t.ds\t7\n");
+            dbuf_printf (oBuf, "\t.ds\t7\n");
         }
     }
   return TRUE;
@@ -264,6 +278,9 @@ hasExtBitOp (int op, int size)
   if (op == RRC
       || op == RLC
       || op == GETHBIT
+      || op == GETABIT
+      || op == GETBYTE
+      || op == GETWORD
       || (op == SWAP && size <= 2)
      )
     return TRUE;
@@ -690,7 +707,7 @@ PORT mcs51_port =
   {
     glue,
     TRUE,                       /* Emit glue around main */
-    MODEL_SMALL | MODEL_LARGE,
+    MODEL_SMALL | MODEL_MEDIUM | MODEL_LARGE,
     MODEL_SMALL
   },
   {
@@ -713,41 +730,47 @@ PORT mcs51_port =
     _defaultRules,
     getInstructionSize,
     getRegsRead,
-    getRegsWritten
+    getRegsWritten,
+    mcs51DeadMove
   },
   {
     /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */
     1, 2, 2, 4, 1, 2, 3, 1, 4, 4
   },
+  /* tags for generic pointers */
+  { 0x00, 0x40, 0x60, 0x80 },		/* far, near, xstack, code */
   {
     "XSTK    (PAG,XDATA)",      // xstack_name
-    "STACK   (DATA)",		// istack_name
-    "CSEG    (CODE)",		// code_name
-    "DSEG    (DATA)",		// data_name
-    "ISEG    (DATA)",		// idata_name
-    "PSEG    (PAG,XDATA)",	// pdata_name
-    "XSEG    (XDATA)",		// xdata_name
-    "BSEG    (BIT)",		// bit_name
-    "RSEG    (DATA)",		// reg_name
-    "GSINIT  (CODE)",		// static_name
-    "OSEG    (OVR,DATA)",	// overlay_name
-    "GSFINAL (CODE)",		// post_static_name
-    "HOME    (CODE)",		// home_name
-    "XISEG   (XDATA)",		// xidata_name - initialized xdata   initialized xdata
-    "XINIT   (CODE)",		// xinit_name - a code copy of xiseg
-    "CONST   (CODE)",		// const_name - const data (code or not)
+    "STACK   (DATA)",           // istack_name
+    "CSEG    (CODE)",           // code_name
+    "DSEG    (DATA)",           // data_name
+    "ISEG    (DATA)",           // idata_name
+    "PSEG    (PAG,XDATA)",      // pdata_name
+    "XSEG    (XDATA)",          // xdata_name
+    "BSEG    (BIT)",            // bit_name
+    "RSEG    (DATA)",           // reg_name
+    "GSINIT  (CODE)",           // static_name
+    "OSEG    (OVR,DATA)",       // overlay_name
+    "GSFINAL (CODE)",           // post_static_name
+    "HOME    (CODE)",           // home_name
+    "XISEG   (XDATA)",          // xidata_name - initialized xdata   initialized xdata
+    "XINIT   (CODE)",           // xinit_name - a code copy of xiseg
+    "CONST   (CODE)",           // const_name - const data (code or not)
+    "CABS    (ABS,CODE)",       // cabs_name - const absolute data (code or not)
+    "XABS    (ABS,XDATA)",      // xabs_name - absolute xdata/pdata
+    "IABS    (ABS,DATA)",       // iabs_name - absolute idata/data
     NULL,
     NULL,
     1
   },
   { _mcs51_genExtraAreas, NULL },
   {
-    +1,		/* direction (+1 = stack grows up) */
-    0,		/* bank_overhead (switch between register banks) */
-    4,		/* isr_overhead */
-    1,		/* call_overhead (2 for return address - 1 for pre-incrementing push */
-    1,		/* reent_overhead */
-    0		/* banked_overhead (switch between code banks) */
+    +1,         /* direction (+1 = stack grows up) */
+    0,          /* bank_overhead (switch between register banks) */
+    4,          /* isr_overhead */
+    1,          /* call_overhead (2 for return address - 1 for pre-incrementing push */
+    1,          /* reent_overhead */
+    0           /* banked_overhead (switch between code banks) */
   },
   {
     /* mcs51 has an 8 bit mul */