X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fmcs51%2Fmain.c;h=402993d8a2e9f377e9672a2dae9718f1a497900f;hb=195ee3f3ee25ce2c5f2a59fbd2779c4cb80527c3;hp=ee97d6883d355b38039c01f9bd71cd2c1c8ec01e;hpb=07cbddd43b4358d9f193bdccc860d7563e2aab93;p=fw%2Fsdcc diff --git a/src/mcs51/main.c b/src/mcs51/main.c index ee97d688..402993d8 100644 --- a/src/mcs51/main.c +++ b/src/mcs51/main.c @@ -19,6 +19,7 @@ static char _defaultRules[] = static char *_mcs51_keywords[] = { "at", + "banked", "bit", "code", "critical", @@ -30,6 +31,8 @@ static char *_mcs51_keywords[] = "pdata", "reentrant", "sfr", + "sfr16", + "sfr32", "sbit", "using", "xdata", @@ -47,9 +50,10 @@ static char *_mcs51_keywords[] = -void mcs51_assignRegisters (eBBlock ** ebbs, int count); +void mcs51_assignRegisters (ebbIndex *); -static int regParmFlg = 0; /* determine if we can register a parameter */ +static int regParmFlg = 0; /* determine if we can register a parameter */ +static int regBitParmFlg = 0; /* determine if we can register a bit parameter */ static void _mcs51_init (void) @@ -58,38 +62,47 @@ _mcs51_init (void) } static void -_mcs51_reset_regparm () +_mcs51_reset_regparm (void) { regParmFlg = 0; + regBitParmFlg = 0; } static int -_mcs51_regparm (sym_link * l) +_mcs51_regparm (sym_link * l, bool reentrant) { + if (IS_SPEC(l) && (SPEC_NOUN(l) == V_BIT)) { + /* bit parameters go to b0 thru b7 */ + if (reentrant && (regBitParmFlg < 8)) { + regBitParmFlg++; + return 12 + regBitParmFlg; + } + return 0; + } if (options.parms_in_bank1 == 0) { - /* simple can pass only the first parameter in a register */ - if (regParmFlg) - return 0; + /* simple can pass only the first parameter in a register */ + if (regParmFlg) + return 0; - regParmFlg = 1; - return 1; + regParmFlg = 1; + return 1; } else { - int size = getSize(l); - int remain ; - - /* first one goes the usual way to DPTR */ - if (regParmFlg == 0) { - regParmFlg += 4 ; - return 1; - } - /* second one onwards goes to RB1_0 thru RB1_7 */ + int size = getSize(l); + int remain ; + + /* first one goes the usual way to DPTR */ + if (regParmFlg == 0) { + regParmFlg += 4 ; + return 1; + } + /* second one onwards goes to RB1_0 thru RB1_7 */ remain = regParmFlg - 4; - if (size > (8 - remain)) { - regParmFlg = 12 ; - return 0; - } - regParmFlg += size ; - return regParmFlg - size + 1; + if (size > (8 - remain)) { + regParmFlg = 12 ; + return 0; + } + regParmFlg += size ; + return regParmFlg - size + 1; } } @@ -141,9 +154,9 @@ static void _mcs51_genAssemblerPreamble (FILE * of) { if (options.parms_in_bank1) { - int i ; - for (i=0; i < 8 ; i++ ) - fprintf (of,"b1_%d = 0x%x \n",i,8+i); + int i ; + for (i=0; i < 8 ; i++ ) + fprintf (of,"b1_%d = 0x%x \n",i,8+i); } } @@ -151,55 +164,74 @@ _mcs51_genAssemblerPreamble (FILE * of) static int _mcs51_genIVT (FILE * of, symbol ** interrupts, int maxInterrupts) { - return FALSE; + int i; + + fprintf (of, "\tljmp\t__sdcc_gsinit_startup\n"); + + /* now for the other interrupts */ + for (i = 0; i < maxInterrupts; i++) + { + if (interrupts[i]) + { + fprintf (of, "\tljmp\t%s\n", interrupts[i]->rname); + if ( i != maxInterrupts - 1 ) + fprintf (of, "\t.ds\t5\n"); + } + else + { + fprintf (of, "\treti\n"); + if ( i != maxInterrupts - 1 ) + fprintf (of, "\t.ds\t7\n"); + } + } + return TRUE; +} + +static void +_mcs51_genExtraAreas(FILE *of, bool hasMain) +{ + tfprintf (of, "\t!area\n", HOME_NAME); + tfprintf (of, "\t!area\n", "GSINIT0 (CODE)"); + tfprintf (of, "\t!area\n", "GSINIT1 (CODE)"); + tfprintf (of, "\t!area\n", "GSINIT2 (CODE)"); + tfprintf (of, "\t!area\n", "GSINIT3 (CODE)"); + tfprintf (of, "\t!area\n", "GSINIT4 (CODE)"); + tfprintf (of, "\t!area\n", "GSINIT5 (CODE)"); + tfprintf (of, "\t!area\n", STATIC_NAME); + tfprintf (of, "\t!area\n", port->mem.post_static_name); + tfprintf (of, "\t!area\n", CODE_NAME); } -/* Generate code to clear XSEG and idata memory. - This clears XSEG, DSEG, BSEG, OSEG, SSEG */ -static void _mcs51_genRAMCLEAR (FILE * of) { - fprintf (of, "; _mcs51_genRAMCLEAR() start\n"); - fprintf (of, " mov r0,#l_XSEG\n"); - fprintf (of, " mov a,r0\n"); - fprintf (of, " orl a,#(l_XSEG >> 8)\n"); - fprintf (of, " jz 00005$\n"); - fprintf (of, " mov r1,#((l_XSEG + 255) >> 8)\n"); - fprintf (of, " mov dptr,#s_XSEG\n"); - fprintf (of, " clr a\n"); - fprintf (of, "00004$: movx @dptr,a\n"); - fprintf (of, " inc dptr\n"); - fprintf (of, " djnz r0,00004$\n"); - fprintf (of, " djnz r1,00004$\n"); - /* r0 is zero now. Clearing 256 byte assuming 128 byte devices don't mind */ - fprintf (of, "00005$: mov @r0,a\n"); - fprintf (of, " djnz r0,00005$\n"); - fprintf (of, "; _mcs51_genRAMCLEAR() end\n"); +static void +_mcs51_genInitStartup (FILE *of) +{ + tfprintf (of, "\t!global\n", "__sdcc_gsinit_startup"); + tfprintf (of, "\t!global\n", "__sdcc_program_startup"); + tfprintf (of, "\t!global\n", "__start__stack"); + + if (options.useXstack) + { + tfprintf (of, "\t!global\n", "__sdcc_init_xstack"); + tfprintf (of, "\t!global\n", "__start__xstack"); + } + + // if the port can copy the XINIT segment to XISEG + if (port->genXINIT) + { + port->genXINIT(of); + } + + if (!getenv("SDCC_NOGENRAMCLEAR")) + tfprintf (of, "\t!global\n", "__mcs51_genRAMCLEAR"); } + /* Generate code to copy XINIT to XISEG */ static void _mcs51_genXINIT (FILE * of) { - fprintf (of, "; _mcs51_genXINIT() start\n"); - fprintf (of, " mov r1,#l_XINIT\n"); - fprintf (of, " mov a,r1\n"); - fprintf (of, " orl a,#(l_XINIT >> 8)\n"); - fprintf (of, " jz 00003$\n"); - fprintf (of, " mov r2,#((l_XINIT+255) >> 8)\n"); - fprintf (of, " mov dptr,#s_XINIT\n"); - fprintf (of, " mov r0,#s_XISEG\n"); - fprintf (of, " mov p2,#(s_XISEG >> 8)\n"); - fprintf (of, "00001$: clr a\n"); - fprintf (of, " movc a,@a+dptr\n"); - fprintf (of, " movx @r0,a\n"); - fprintf (of, " inc dptr\n"); - fprintf (of, " inc r0\n"); - fprintf (of, " cjne r0,#0,00002$\n"); - fprintf (of, " inc p2\n"); - fprintf (of, "00002$: djnz r1,00001$\n"); - fprintf (of, " djnz r2,00001$\n"); - fprintf (of, " mov p2,#0xFF\n"); - fprintf (of, "00003$:\n"); - fprintf (of, "; _mcs51_genXINIT() end\n"); - - if (!getenv("SDCC_NOGENRAMCLEAR")) _mcs51_genRAMCLEAR (of); + tfprintf (of, "\t!global\n", "__mcs51_genXINIT"); + + if (!getenv("SDCC_NOGENRAMCLEAR")) + tfprintf (of, "\t!global\n", "__mcs51_genXRAMCLEAR"); } @@ -211,16 +243,16 @@ static bool cseCostEstimation (iCode *ic, iCode *pdic) /* if it is a pointer then return ok for now */ if (IC_RESULT(ic) && IS_PTR(result_type)) return 1; - - /* if bitwise | add & subtract then no since mcs51 is pretty good at it + + /* if bitwise | add & subtract then no since mcs51 is pretty good at it so we will cse only if they are local (i.e. both ic & pdic belong to the same basic block */ if (IS_BITWISE_OP(ic) || ic->op == '+' || ic->op == '-') { - /* then if they are the same Basic block then ok */ - if (ic->eBBlockNum == pdic->eBBlockNum) return 1; - else return 0; + /* then if they are the same Basic block then ok */ + if (ic->eBBlockNum == pdic->eBBlockNum) return 1; + else return 0; } - + /* for others it is cheaper to do the cse */ return 1; } @@ -245,7 +277,7 @@ oclsExpense (struct memmap *oclass) { if (IN_FARSPACE(oclass)) return 1; - + return 0; } @@ -262,7 +294,7 @@ instructionSize(char *inst, char *op1, char *op2) /* Based on the current (2003-08-22) code generation for the small library, the top instruction probability is: - + 57% mov/movx/movc 6% push 6% pop @@ -279,20 +311,20 @@ instructionSize(char *inst, char *op1, char *op2) if (*(inst+3)=='c') return 1; /* movc */ if (IS_C (op1) || IS_C (op2)) return 2; if (IS_A (op1)) - { - if (IS_Rn (op2) || IS_atRi (op2)) return 1; - return 2; - } + { + if (IS_Rn (op2) || IS_atRi (op2)) return 1; + return 2; + } if (IS_Rn(op1) || IS_atRi(op1)) - { - if (IS_A(op2)) return 1; - return 2; - } + { + if (IS_A(op2)) return 1; + return 2; + } if (strcmp (op1, "dptr") == 0) return 3; if (IS_A (op2) || IS_Rn (op2) || IS_atRi (op2)) return 2; return 3; } - + if (ISINST ("push")) return 2; if (ISINST ("pop")) return 2; @@ -310,7 +342,7 @@ instructionSize(char *inst, char *op1, char *op2) if (ISINST ("jb")) return 3; if (ISINST ("jnb")) return 3; if (ISINST ("jbc")) return 3; - if (ISINST ("jmp")) return 1; // always jmp @a+dptr + if (ISINST ("jmp")) return 1; // always jmp @a+dptr if (ISINST ("jz")) return 2; if (ISINST ("jnz")) return 2; if (ISINST ("cjne")) return 3; @@ -320,10 +352,10 @@ instructionSize(char *inst, char *op1, char *op2) if (ISINST ("xchd")) return 1; if (ISINST ("reti")) return 1; if (ISINST ("nop")) return 1; - if (ISINST ("acall")) return 1; + if (ISINST ("acall")) return 2; if (ISINST ("ajmp")) return 2; - + if (ISINST ("add") || ISINST ("addc") || ISINST ("subb") || ISINST ("xch")) { if (IS_Rn(op2) || IS_atRi(op2)) return 1; @@ -339,15 +371,15 @@ instructionSize(char *inst, char *op1, char *op2) { if (IS_C(op1)) return 2; if (IS_A(op1)) - { - if (IS_Rn(op2) || IS_atRi(op2)) return 1; - return 2; - } + { + if (IS_Rn(op2) || IS_atRi(op2)) return 1; + return 2; + } else - { - if (IS_A(op2)) return 2; - return 3; - } + { + if (IS_A(op2)) return 2; + return 3; + } } if (ISINST ("clr") || ISINST ("setb") || ISINST ("cpl")) { @@ -374,7 +406,7 @@ newAsmLineNode (void) aln->size = 0; aln->regsRead = NULL; aln->regsWritten = NULL; - + return aln; } @@ -428,20 +460,20 @@ mcs51operandCompare (const void *key, const void *member) return strcmp((const char *)key, ((mcs51operanddata *)member)->name); } -static void +static void updateOpRW (asmLineNode *aln, char *op, char *optype) { mcs51operanddata *opdat; char *dot; - + dot = strchr(op, '.'); if (dot) *dot = '\0'; opdat = bsearch (op, mcs51operandDataTable, - sizeof(mcs51operandDataTable)/sizeof(mcs51operanddata), - sizeof(mcs51operanddata), mcs51operandCompare); - + sizeof(mcs51operandDataTable)/sizeof(mcs51operanddata), + sizeof(mcs51operanddata), mcs51operandCompare); + if (opdat && strchr(optype,'r')) { if (opdat->regIdx1 >= 0) @@ -462,13 +494,13 @@ updateOpRW (asmLineNode *aln, char *op, char *optype) aln->regsRead = bitVectSetBit (aln->regsRead, R0_IDX); if (!strcmp(op, "@r1")) aln->regsRead = bitVectSetBit (aln->regsRead, R1_IDX); - if (!strstr(op, "dptr")) - { - aln->regsRead = bitVectSetBit (aln->regsRead, DPL_IDX); - aln->regsRead = bitVectSetBit (aln->regsRead, DPH_IDX); - } - if (!strstr(op, "a+")) - aln->regsRead = bitVectSetBit (aln->regsRead, A_IDX); + if (strstr(op, "dptr")) + { + aln->regsRead = bitVectSetBit (aln->regsRead, DPL_IDX); + aln->regsRead = bitVectSetBit (aln->regsRead, DPH_IDX); + } + if (strstr(op, "a+")) + aln->regsRead = bitVectSetBit (aln->regsRead, A_IDX); } } @@ -485,9 +517,9 @@ mcs51opcodedata; static mcs51opcodedata mcs51opcodeDataTable[] = { {"acall","j", "", "", ""}, - {"ajmp", "j", "", "", ""}, {"add", "", "w", "rw", "r"}, {"addc", "", "rw", "rw", "r"}, + {"ajmp", "j", "", "", ""}, {"anl", "", "", "rw", "r"}, {"cjne", "j", "w", "r", "r"}, {"clr", "", "", "w", ""}, @@ -529,7 +561,7 @@ static mcs51opcodedata mcs51opcodeDataTable[] = {"xchd", "", "", "rw", "rw"}, {"xrl", "", "", "rw", "r"}, }; - + static int mcs51opcodeCompare (const void *key, const void *member) { @@ -542,12 +574,12 @@ asmLineNodeFromLineNode (lineNode *ln) asmLineNode *aln = newAsmLineNode(); char *op, op1[256], op2[256]; int opsize; - const char *p; + const unsigned char *p; char inst[8]; mcs51opcodedata *opdat; p = ln->line; - + while (*p && isspace(*p)) p++; for (op = inst, opsize=1; *p; p++) { @@ -555,13 +587,13 @@ asmLineNodeFromLineNode (lineNode *ln) break; else if (opsize < sizeof(inst)) - *op++ = tolower(*p), opsize++; + *op++ = tolower(*p), opsize++; } *op = '\0'; if (*p == ';' || *p == ':' || *p == '=') return aln; - + while (*p && isspace(*p)) p++; if (*p == '=') return aln; @@ -572,7 +604,7 @@ asmLineNodeFromLineNode (lineNode *ln) *op++ = tolower(*p), opsize++; } *op = '\0'; - + if (*p == ',') p++; for (op = op2, opsize=1; *p && *p != ','; p++) { @@ -587,8 +619,8 @@ asmLineNodeFromLineNode (lineNode *ln) aln->regsWritten = newBitVect (END_IDX); opdat = bsearch (inst, mcs51opcodeDataTable, - sizeof(mcs51opcodeDataTable)/sizeof(mcs51opcodedata), - sizeof(mcs51opcodedata), mcs51opcodeCompare); + sizeof(mcs51opcodeDataTable)/sizeof(mcs51opcodedata), + sizeof(mcs51opcodedata), mcs51opcodeCompare); if (opdat) { @@ -608,7 +640,7 @@ getInstructionSize (lineNode *line) { if (!line->aln) line->aln = asmLineNodeFromLineNode (line); - + return line->aln->size; } @@ -617,7 +649,7 @@ getRegsRead (lineNode *line) { if (!line->aln) line->aln = asmLineNodeFromLineNode (line); - + return line->aln->regsRead; } @@ -626,7 +658,7 @@ getRegsWritten (lineNode *line) { if (!line->aln) line->aln = asmLineNodeFromLineNode (line); - + return line->aln->regsWritten; } @@ -653,22 +685,22 @@ PORT mcs51_port = { TARGET_ID_MCS51, "mcs51", - "MCU 8051", /* Target name */ - NULL, /* Processor name */ + "MCU 8051", /* Target name */ + NULL, /* Processor name */ { glue, - TRUE, /* Emit glue around main */ + TRUE, /* Emit glue around main */ MODEL_SMALL | MODEL_LARGE, MODEL_SMALL }, { _asmCmd, NULL, - "-plosgffc", /* Options with debug */ - "-plosgff", /* Options without debug */ + "-plosgffc", /* Options with debug */ + "-plosgff", /* Options without debug */ 0, ".asm", - NULL /* no do_assemble function */ + NULL /* no do_assemble function */ }, { _linkCmd, @@ -684,69 +716,89 @@ PORT mcs51_port = getRegsWritten }, { - /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */ + /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */ 1, 2, 2, 4, 1, 2, 3, 1, 4, 4 }, { - "XSEG (XDATA)", - "STACK (DATA)", - "CSEG (CODE)", - "DSEG (DATA)", - "ISEG (DATA)", - "XSEG (XDATA)", - "BSEG (BIT)", - "RSEG (DATA)", - "GSINIT (CODE)", - "OSEG (OVR,DATA)", - "GSFINAL (CODE)", - "HOME (CODE)", - "XISEG (XDATA)", // initialized xdata - "XINIT (CODE)", // a code copy of xiseg + "XSTK (PAG,XDATA)", // xstack_name + "STACK (DATA)", // istack_name + "CSEG (CODE)", // code_name + "DSEG (DATA)", // data_name + "ISEG (DATA)", // idata_name + "PSEG (PAG,XDATA)", // pdata_name + "XSEG (XDATA)", // xdata_name + "BSEG (BIT)", // bit_name + "RSEG (DATA)", // reg_name + "GSINIT (CODE)", // static_name + "OSEG (OVR,DATA)", // overlay_name + "GSFINAL (CODE)", // post_static_name + "HOME (CODE)", // home_name + "XISEG (XDATA)", // xidata_name - initialized xdata initialized xdata + "XINIT (CODE)", // xinit_name - a code copy of xiseg + "CONST (CODE)", // const_name - const data (code or not) NULL, NULL, 1 }, - { NULL, NULL }, + { _mcs51_genExtraAreas, NULL }, { - +1, 0, 4, 1, 1, 0 + +1, /* direction (+1 = stack grows up) */ + 0, /* bank_overhead (switch between register banks) */ + 4, /* isr_overhead */ + 1, /* call_overhead (2 for return address - 1 for pre-incrementing push */ + 1, /* reent_overhead */ + 0 /* banked_overhead (switch between code banks) */ }, - /* mcs51 has an 8 bit mul */ { + /* mcs51 has an 8 bit mul */ 1, -1 }, + { + mcs51_emitDebuggerSymbol + }, + { + 256, /* maxCount */ + 2, /* sizeofElement */ + {6,9,15}, /* sizeofMatchJump[] */ + {9,18,36}, /* sizeofRangeCompare[] */ + 4, /* sizeofSubtract */ + 6, /* sizeofDispatch */ + }, "_", _mcs51_init, _mcs51_parseOptions, NULL, + NULL, _mcs51_finaliseOptions, _mcs51_setDefaultOptions, mcs51_assignRegisters, _mcs51_getRegName, _mcs51_keywords, _mcs51_genAssemblerPreamble, - NULL, /* no genAssemblerEnd */ + NULL, /* no genAssemblerEnd */ _mcs51_genIVT, _mcs51_genXINIT, + _mcs51_genInitStartup, _mcs51_reset_regparm, _mcs51_regparm, NULL, NULL, NULL, - hasExtBitOp, /* hasExtBitOp */ - oclsExpense, /* oclsExpense */ + hasExtBitOp, /* hasExtBitOp */ + oclsExpense, /* oclsExpense */ FALSE, - TRUE, /* little endian */ - 0, /* leave lt */ - 0, /* leave gt */ - 1, /* transform <= to ! > */ - 1, /* transform >= to ! < */ - 1, /* transform != to !(a == b) */ - 0, /* leave == */ + TRUE, /* little endian */ + 0, /* leave lt */ + 0, /* leave gt */ + 1, /* transform <= to ! > */ + 1, /* transform >= to ! < */ + 1, /* transform != to !(a == b) */ + 0, /* leave == */ FALSE, /* No array initializer support. */ cseCostEstimation, - NULL, /* no builtin functions */ - GPOINTER, /* treat unqualified pointers as "generic" pointers */ - 1, /* reset labelKey to 1 */ - 1, /* globals & local static allowed */ + NULL, /* no builtin functions */ + GPOINTER, /* treat unqualified pointers as "generic" pointers */ + 1, /* reset labelKey to 1 */ + 1, /* globals & local static allowed */ PORT_MAGIC };