X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Flpc%2Flpc.h;h=4141f3569bd32cd52501c18e2cc33d747979360f;hb=ac089d4fb930b7dbc4161259fd9bddba94395ebc;hp=5a1987f57338792b5b1ebc54e5e7514523df189d;hpb=91d201abcbe9373360919406427b7e4fb9e1b42e;p=fw%2Faltos

diff --git a/src/lpc/lpc.h b/src/lpc/lpc.h
index 5a1987f5..4141f356 100644
--- a/src/lpc/lpc.h
+++ b/src/lpc/lpc.h
@@ -116,7 +116,7 @@ extern struct lpc_ioconf lpc_ioconf;
 #define  LPC_IOCONF_FUNC_SSEL0		1
 #define  LPC_IOCONF_FUNC_CT16B0_CAP0	2
 
-/* PIO0_3
+/* PIO0_3 */
 #define  LPC_IOCONF_FUNC_PIO0_3		0
 #define  LPC_IOCONF_FUNC_USB_VBUS	1
 
@@ -395,7 +395,7 @@ struct lpc_scb {
 	vuint32_t	syspllclksel;	/* 0x40 */
 	vuint32_t	syspllclkuen;
 	vuint32_t	usbpllclksel;
-	vuint32_t	usbplllclkuen;
+	vuint32_t	usbpllclkuen;
 
 	uint32_t	r50[8];
 
@@ -600,8 +600,13 @@ extern struct lpc_scb lpc_scb;
 #define LPC_SCB_USBCLKUEN_ENA		0
 #define LPC_SCB_USBCLKDIV_DIV		0
 
-#define LPC_SCB_CLKOUTSEL_
-#define LPC_SCB_CLKOUTUEN_
+#define LPC_SCB_CLKOUTSEL_SEL		0
+#define  LPC_SCB_CLKOUTSEL_SEL_IRC		0
+#define  LPC_SCB_CLKOUTSEL_SEL_SYSOSC		1
+#define  LPC_SCB_CLKOUTSEL_SEL_LF		2
+#define  LPC_SCB_CLKOUTSEL_SEL_MAIN_CLOCK	3
+
+#define LPC_SCB_CLKOUTUEN_ENA		0
 
 #define LPC_SCB_PDRUNCFG_IRCOUT_PD	0
 #define LPC_SCB_PDRUNCFG_IRC_PD		1
@@ -823,11 +828,117 @@ struct lpc_usb {
 	vuint32_t	inten;
 	vuint32_t	intsetstat;
 	vuint32_t	introuting;
+	uint32_t	r30;
 	vuint32_t	eptoggle;
 } lpc_usb;
 
 extern struct lpc_usb lpc_usb;
 
+#define LPC_USB_DEVCMDSTAT_DEV_ADDR	0
+#define LPC_USB_DEVCMDSTAT_DEV_ADDR_MASK	0x7f
+#define LPC_USB_DEVCMDSTAT_DEV_EN	7
+#define LPC_USB_DEVCMDSTAT_SETUP	8
+#define LPC_USB_DEVCMDSTAT_PLL_ON	9
+#define LPC_USB_DEVCMDSTAT_LPM_SUP	11
+#define LPC_USB_DEVCMDSTAT_INTONNAK_AO	12
+#define LPC_USB_DEVCMDSTAT_INTONNAK_AI	13
+#define LPC_USB_DEVCMDSTAT_INTONNAK_CO	14
+#define LPC_USB_DEVCMDSTAT_INTONNAK_CI	15
+#define LPC_USB_DEVCMDSTAT_DCON		16
+#define LPC_USB_DEVCMDSTAT_DSUS		17
+#define LPC_USB_DEVCMDSTAT_LPM_SUS	19
+#define LPC_USB_DEVCMDSTAT_LPM_REWP	20
+#define LPC_USB_DEVCMDSTAT_DCON_C	24
+#define LPC_USB_DEVCMDSTAT_DSUS_C	25
+#define LPC_USB_DEVCMDSTAT_DRES_C	26
+#define LPC_USB_DEVCMDSTAT_VBUSDEBOUNCED	28
+
+#define LPC_USB_INFO_FRAME_NR		0
+#define LPC_USB_INFO_FRAME_NR_MASK	0x3ff
+#define LPC_USB_INFO_ERR_CODE		11
+#define LPC_USB_INFO_ERR_CODE_NO_ERROR			0
+#define LPC_USB_INFO_ERR_CODE_PID_ENCODING_ERROR	1
+#define LPC_USB_INFO_ERR_CODE_PID_UNKNOWN		2
+#define LPC_USB_INFO_ERR_CODE_PACKET_UNEXPECTED		3
+#define LPC_USB_INFO_ERR_CODE_TOKEN_CRC_ERROR		4
+#define LPC_USB_INFO_ERR_CODE_DATA_CRC_ERROR		5
+#define LPC_USB_INFO_ERR_CODE_TIME_OUT			6
+#define LPC_USB_INFO_ERR_CODE_BABBLE			7
+#define LPC_USB_INFO_ERR_CODE_TRUNCATED_EOP		8
+#define LPC_USB_INFO_ERR_CODE_SENT_RECEIVED_NAK		9
+#define LPC_USB_INFO_ERR_CODE_SENT_STALL		0xa
+#define LPC_USB_INFO_ERR_CODE_OVERRUN			0xb
+#define LPC_USB_INFO_ERR_CODE_SENT_EMPTY_PACKET		0xc
+#define LPC_USB_INFO_ERR_CODE_BITSTUFF_ERROR		0xd
+#define LPC_USB_INFO_ERR_CODE_SYNC_ERROR		0xe
+#define LPC_USB_INFO_ERR_CODE_WRONG_DATA_TOGGLE		0xf
+#define LPC_USB_INFO_ERR_CODE_MASK			0xf
+
+#define LPC_USB_EPLISTSTART_EP_LIST			0
+
+#define LPC_USB_DATABUFSTART_DA_BUF			0
+
+#define LPC_USB_LPM_HIRD_HW		0
+#define LPC_USB_LPM_HIRD_HW_MASK		0xf
+#define LPC_USB_LPM_HIRD_SW		4
+#define LPC_USB_LPM_HIRD_SW_MASK		0xf
+#define LPC_USB_LPM_DATA_PENDING	8
+
+#define LPC_USB_EPSKIP_SKIP		0
+
+#define LPC_USB_EPINUSE_BUF(ep)		(ep)
+
+#define LPC_USB_EPBUFCFG_BUF_SB(ep)	(ep)
+
+#define LPC_USB_INT_EPOUT(ep)		((ep) << 1)
+#define LPC_USB_INT_EPIN(ep)		(((ep) << 1) + 1)
+
+#define LPC_USB_INT_FRAME		30
+#define LPC_USB_INT_DEV			31
+
+#define LPC_USB_INTIN_EP_INT_EN(ep)	(ep)
+#define LPC_USB_INTIN_FRAME_INT_EN	30
+#define LPC_USB_INTIN_DEV_INT_EN	31
+
+#define LPC_USB_INTSETSTAT_EP_SET_INT(ep)	(ep)
+#define LPC_USB_INTSETSTAT_FRAME_SET_INT	30
+#define LPC_USB_INTSETSTAT_DEV_SET_INT		31
+
+#define LPC_USB_INTROUTING_ROUTE_INT(ep)	(ep)
+#define LPC_USB_INTROUTING_INT30		30
+#define LPC_USB_INTROUTING_INT31		31
+
+#define LPC_USB_EPTOGGLE_TOGGLE(ep)		(ep)
+
+struct lpc_usb_epn {
+	vuint32_t		out[2];
+	vuint32_t		in[2];
+};
+
+struct lpc_usb_endpoint {
+	vuint32_t		ep0_out;
+	vuint32_t		setup;
+	vuint32_t		ep0_in;
+	vuint32_t		reserved_0c;
+	struct lpc_usb_epn	epn[4];
+};
+
+/* Assigned in registers.ld to point at the base
+ * of USB ram
+ */
+
+extern uint8_t lpc_usb_sram[];
+
+#define LPC_USB_EP_ACTIVE		31
+#define LPC_USB_EP_DISABLED		30
+#define LPC_USB_EP_STALL		29
+#define LPC_USB_EP_TOGGLE_RESET		28
+#define LPC_USB_EP_RATE_FEEDBACK	27
+#define LPC_USB_EP_ENDPOINT_ISO		26
+#define LPC_USB_EP_NBYTES		16
+#define  LPC_USB_EP_NBYTES_MASK			0x3ff
+#define LPC_USB_EP_OFFSET		0
+
 #define LPC_ISR_PIN_INT0_POS	0
 #define LPC_ISR_PIN_INT1_POS	1
 #define LPC_ISR_PIN_INT2_POS	2
@@ -927,4 +1038,20 @@ lpc_nvic_get_priority(int irq) {
 	return (lpc_nvic.ipr[IRQ_PRIO_REG(irq)] >> IRQ_PRIO_BIT(irq)) & IRQ_PRIO_MASK(0);
 }
 
+struct arm_scb {
+	vuint32_t	cpuid;
+	vuint32_t	icsr;
+	uint32_t	reserved08;
+	vuint32_t	aircr;
+
+	vuint32_t	scr;
+	vuint32_t	ccr;
+	uint32_t	reserved18;
+	vuint32_t	shpr2;
+
+	vuint32_t	shpr3;
+};
+
+extern struct arm_scb arm_scb;
+
 #endif /* _LPC_H_ */