X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Flpc%2Faltos.ld;h=028ad775d28ef579a3f44e99c9d25422f4874001;hb=2f87e182d9f0b3c2856f62149371ad70b16148cf;hp=bcfba1ea17955e4038772a820d42778f9813cfb9;hpb=ac089d4fb930b7dbc4161259fd9bddba94395ebc;p=fw%2Faltos

diff --git a/src/lpc/altos.ld b/src/lpc/altos.ld
index bcfba1ea..028ad775 100644
--- a/src/lpc/altos.ld
+++ b/src/lpc/altos.ld
@@ -3,7 +3,8 @@
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -16,9 +17,10 @@
  */
 
 MEMORY {
-	rom (rx) : ORIGIN = 0x00000000, LENGTH = 32K
-	ram (!w) : ORIGIN = 0x10000000, LENGTH = 4K - 512
-	stack (!w) : ORIGIN = 0x10000000 + 4K - 512, LENGTH = 512
+	rom (rx) : ORIGIN = 0x00001000, LENGTH = 28K
+	ram (!w) : ORIGIN = 0x10000000, LENGTH = 4K - 128
+	usb (!x) : ORIGIN = 0x20004000 + 2K - 256, LENGTH = 256
+	stack (!w) : ORIGIN = 0x10000000 + 4K - 128, LENGTH = 128
 }
 
 INCLUDE registers.ld
@@ -30,11 +32,15 @@ SECTIONS {
 	 * Rom contents
 	 */
 
-	.text ORIGIN(rom) : {
-		__text_start__ = .;
+	.interrupt ORIGIN(ram) : AT (ORIGIN(rom)) {
+		__interrupt_start__ = .;
+		__interrupt_rom__ = ORIGIN(rom);
 		*(.interrupt)	/* Interrupt vectors */
+		__interrupt_end__ = .;
+	} > ram
 
-		. = ORIGIN(rom) + 0x100;
+	.text ORIGIN(rom) + 0x100 : {
+		__text_start__ = .;
 
 		ao_romconfig.o(.romconfig*)
 		ao_product.o(.romconfig*)
@@ -49,23 +55,35 @@ SECTIONS {
 		__text_end__ = .;
 	} > rom
 
+	/* Boot data which must live at the start of ram so that
+	 * the application and bootloader share the same addresses.
+	 * This must be all uninitialized data
+	 */
+	.boot : {
+		__boot_start__ = .;
+		*(.boot)
+		. = ALIGN(4);
+		__boot_end__ = .;
+	} >ram
+
 	/* Data -- relocated to RAM, but written to ROM
 	 */
-	.data ORIGIN(ram) : AT (ADDR(.ARM.exidx) + SIZEOF (.ARM.exidx)) {
-		__data_start__ = .;
+	.data : AT (ADDR(.ARM.exidx) + SIZEOF (.ARM.exidx)) {
+		_start__ = .;
 		*(.data)	/* initialized data */
-		__data_end__ = .;
+		_end__ = .;
 		__bss_start__ = .;
 	} >ram
 
 	.bss : {
+		__bss_start__ = .;
 		*(.bss)
 		*(COMMON)
 		__bss_end__ = .;
 	} >ram
+	PROVIDE(end = .);
 
 	PROVIDE(__stack__ = ORIGIN(stack) + LENGTH(stack));
-	PROVIDE(end = .);
 }
 
 ENTRY(start);