X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fgdb-server.c;h=d44f20f18cb6cab1b7b77543ea6dda357a24781f;hb=08a79ed0fe770d11a06c7b661f9ee542a7d8d85b;hp=b48f7d6d8256af38f9676c34aaf6f51968402ff6;hpb=7c294cf6a19fa8c682138097381d3af80f1a9c80;p=fw%2Fstlink

diff --git a/src/gdb-server.c b/src/gdb-server.c
index b48f7d6..d44f20f 100644
--- a/src/gdb-server.c
+++ b/src/gdb-server.c
@@ -19,22 +19,34 @@
 
 static const char hex[] = "0123456789abcdef";
 
-// configured for STM32F100RB
-static const char* const c_memory_map =
-  "<?xml version=\"1.0\"?>"
-  "<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
-  "     \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
-  "<memory-map>"
-  "  <memory type=\"rom\" start=\"0x00000000\" length=\"0x20000\"/>"    // code = sram or flash
-  "  <memory type=\"ram\" start=\"0x20000000\" length=\"0x2000\"/>"     // sram 8k
-  "  <memory type=\"flash\" start=\"0x08000000\" length=\"0x20000\">"   // flash 128k
-  "    <property name=\"blocksize\">0x400</property>"                   // 1k pages
-  "  </memory>"
-  "  <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
-  "  <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
-  "</memory-map>";
+static const char* current_memory_map = NULL;
+
+struct chip_params {
+	uint32_t chip_id;
+	char* description;
+	uint32_t max_flash_size, flash_pagesize;
+	uint32_t sram_size;
+	uint32_t bootrom_base, bootrom_size;
+} const devices[] = {
+	{ 0x412, "Low-density device",
+	  0x8000,   0x400, 0x2800,  0x1ffff000, 0x800  },
+	{ 0x410, "Medium-density device",
+	  0x20000,  0x400, 0x5000,  0x1ffff000, 0x800  },
+	{ 0x414, "High-density device",
+	  0x80000,  0x800, 0x10000, 0x1ffff000, 0x800  },
+	{ 0x418, "Connectivity line device",
+	  0x40000,  0x800, 0x10000, 0x1fffb000, 0x4800 },
+	{ 0x420, "Medium-density value line device",
+	  0x20000,  0x400, 0x2000,  0x1ffff000, 0x800  },
+	{ 0x428, "High-density value line device",
+	  0x80000,  0x800, 0x8000,  0x1ffff000, 0x800  },
+	{ 0x430, "XL-density device",
+	  0x100000, 0x800, 0x18000, 0x1fffe000, 0x1800 },
+	{ 0 }
+};
 
 int serve(struct stlink* sl, int port);
+char* make_memory_map(const struct chip_params *params, uint32_t flash_size);
 
 int main(int argc, char** argv) {
 	if(argc != 3) {
@@ -49,8 +61,40 @@ int main(int argc, char** argv) {
 	if(stlink_current_mode(sl) != STLINK_DEV_DEBUG_MODE)
 		stlink_enter_swd_mode(sl);
 
-	stlink_core_id(sl);
-	printf("Debugging ARM core %08x.\n", sl->core_id);
+	uint32_t chip_id;
+
+	stlink_read_mem32(sl, 0xE0042000, 4);
+	chip_id = sl->q_buf[0] | (sl->q_buf[1] << 8) | (sl->q_buf[2] << 16) |
+		(sl->q_buf[3] << 24);
+
+	printf("Chip ID is %08x.\n", chip_id);
+
+	const struct chip_params* params = NULL;
+
+	for(int i = 0; i < sizeof(devices) / sizeof(devices[0]); i++) {
+		if(devices[i].chip_id == (chip_id & 0xFFF)) {
+			params = &devices[i];
+			break;
+		}
+	}
+
+	if(params == NULL) {
+		fprintf(stderr, "Cannot recognize the connected device!\n");
+		return 0;
+	}
+
+	printf("Device connected: %s\n", params->description);
+	printf("Device parameters: SRAM: 0x%x bytes, Flash: up to 0x%x bytes in pages of 0x%x bytes\n",
+		params->sram_size, params->max_flash_size, params->flash_pagesize);
+
+	uint32_t flash_size;
+
+	stlink_read_mem32(sl, 0x1FFFF7E0, 4);
+	flash_size = sl->q_buf[0] | (sl->q_buf[1] << 8);
+
+	printf("Flash size is %d KiB.\n", flash_size);
+
+	current_memory_map = make_memory_map(params, flash_size * 0x400);
 
 	int port = atoi(argv[1]);
 
@@ -61,6 +105,36 @@ int main(int argc, char** argv) {
 	return 0;
 }
 
+static const char* const memory_map_template =
+  "<?xml version=\"1.0\"?>"
+  "<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
+  "     \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
+  "<memory-map>"
+  "  <memory type=\"rom\" start=\"0x00000000\" length=\"0x%x\"/>"       // code = sram, bootrom or flash; flash is bigger
+  "  <memory type=\"ram\" start=\"0x20000000\" length=\"0x%x\"/>"       // sram 8k
+  "  <memory type=\"flash\" start=\"0x08000000\" length=\"0x%x\">"
+  "    <property name=\"blocksize\">0x%x</property>"
+  "  </memory>"
+  "  <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
+  "  <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
+  "  <memory type=\"rom\" start=\"0x%08x\" length=\"0x%x\"/>"           // bootrom
+  "  <memory type=\"rom\" start=\"0x1ffff800\" length=\"0x8\"/>"        // option byte area
+  "</memory-map>";
+
+char* make_memory_map(const struct chip_params *params, uint32_t flash_size) {
+	/* This will be freed in serve() */
+	char* map = malloc(4096);
+	map[0] = '\0';
+
+	snprintf(map, 4096, memory_map_template,
+			flash_size,
+			params->sram_size,
+			flash_size, params->flash_pagesize,
+			params->bootrom_base, params->bootrom_size);
+
+	return map;
+}
+
 #define CODE_BREAK_NUM	6
 
 #define CODE_BREAK_LOW	0x01
@@ -369,7 +443,7 @@ int serve(struct stlink* sl, int port) {
 				const char* data = NULL;
 
 				if(!strcmp(type, "memory-map") && !strcmp(op, "read"))
-					data = c_memory_map;
+					data = current_memory_map;
 
 				if(data) {
 					unsigned data_length = strlen(data);