X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fpic32mx.c;h=dc6b28d821489523a93c1f69aa23e0212b5686cf;hb=3d135a5c70db67ed13cc93eeab0b700f6ef8a412;hp=570a2cfb239b56126347cea3a275818b0c7b0575;hpb=ef14384b681af4f731f768bb866457832af6925f;p=fw%2Fopenocd diff --git a/src/flash/nor/pic32mx.c b/src/flash/nor/pic32mx.c index 570a2cfb2..dc6b28d82 100644 --- a/src/flash/nor/pic32mx.c +++ b/src/flash/nor/pic32mx.c @@ -46,11 +46,11 @@ * Note: These macros only work for KSEG0/KSEG1 addresses. */ -#define Virt2Phys(v) ((v) & 0x1FFFFFFF) +#define virt2phys(v) ((v) & 0x1FFFFFFF) /* pic32mx configuration register locations */ -#define PIC32MX_DEVCFG0_1xx_2xx 0xBFC00BFC +#define PIC32MX_DEVCFG0_1XX_2XX 0xBFC00BFC #define PIC32MX_DEVCFG0 0xBFC02FFC #define PIC32MX_DEVCFG1 0xBFC02FF8 #define PIC32MX_DEVCFG2 0xBFC02FF4 @@ -91,11 +91,11 @@ #define NVMKEY1 0xAA996655 #define NVMKEY2 0x556699AA -#define MX_1xx_2xx 1 /* PIC32mx1xx/2xx */ -#define MX_17x_27x 2 /* PIC32mx17x/27x */ +#define MX_1XX_2XX 1 /* PIC32mx1xx/2xx */ +#define MX_17X_27X 2 /* PIC32mx17x/27x */ struct pic32mx_flash_bank { - int probed; + bool probed; int dev_type; /* Default 0. 1 for Pic32MX1XX/2XX variant */ }; @@ -211,7 +211,7 @@ FLASH_BANK_COMMAND_HANDLER(pic32mx_flash_bank_command) pic32mx_info = malloc(sizeof(struct pic32mx_flash_bank)); bank->driver_priv = pic32mx_info; - pic32mx_info->probed = 0; + pic32mx_info->probed = false; pic32mx_info->dev_type = 0; return ERROR_OK; @@ -279,9 +279,9 @@ static int pic32mx_protect_check(struct flash_bank *bank) } switch (pic32mx_info->dev_type) { - case MX_1xx_2xx: - case MX_17x_27x: - config0_address = PIC32MX_DEVCFG0_1xx_2xx; + case MX_1XX_2XX: + case MX_17X_27X: + config0_address = PIC32MX_DEVCFG0_1XX_2XX; break; default: config0_address = PIC32MX_DEVCFG0; @@ -292,7 +292,7 @@ static int pic32mx_protect_check(struct flash_bank *bank) if ((devcfg0 & (1 << 28)) == 0) /* code protect bit */ num_pages = 0xffff; /* All pages protected */ - else if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) { + else if (virt2phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) { if (devcfg0 & (1 << 24)) num_pages = 0; /* All pages unprotected */ else @@ -300,10 +300,10 @@ static int pic32mx_protect_check(struct flash_bank *bank) } else { /* pgm flash */ switch (pic32mx_info->dev_type) { - case MX_1xx_2xx: + case MX_1XX_2XX: num_pages = (~devcfg0 >> 10) & 0x7f; break; - case MX_17x_27x: + case MX_17X_27X: num_pages = (~devcfg0 >> 10) & 0x1ff; break; default: @@ -332,7 +332,7 @@ static int pic32mx_erase(struct flash_bank *bank, unsigned int first, } if ((first == 0) && (last == (bank->num_sectors - 1)) - && (Virt2Phys(bank->base) == PIC32MX_PHYS_PGM_FLASH)) { + && (virt2phys(bank->base) == PIC32MX_PHYS_PGM_FLASH)) { /* this will only erase the Program Flash (PFM), not the Boot Flash (BFM) * we need to use the MTAP to perform a full erase */ LOG_DEBUG("Erasing entire program flash"); @@ -345,7 +345,7 @@ static int pic32mx_erase(struct flash_bank *bank, unsigned int first, } for (unsigned int i = first; i <= last; i++) { - target_write_u32(target, PIC32MX_NVMADDR, Virt2Phys(bank->base + bank->sectors[i].offset)); + target_write_u32(target, PIC32MX_NVMADDR, virt2phys(bank->base + bank->sectors[i].offset)); status = pic32mx_nvm_exec(bank, NVMCON_OP_PAGE_ERASE, 10); @@ -372,7 +372,7 @@ static int pic32mx_protect(struct flash_bank *bank, int set, unsigned int first, return ERROR_OK; } -/* see contib/loaders/flash/pic32mx.s for src */ +/* see contrib/loaders/flash/pic32mx.s for src */ static uint32_t pic32mx_flash_write_code[] = { /* write: */ @@ -465,8 +465,8 @@ static int pic32mx_write_block(struct flash_bank *bank, const uint8_t *buffer, /* Change values for counters and row size, depending on variant */ switch (pic32mx_info->dev_type) { - case MX_1xx_2xx: - case MX_17x_27x: + case MX_1XX_2XX: + case MX_17X_27X: /* 128 byte row */ pic32mx_flash_write_code[8] = 0x2CD30020; pic32mx_flash_write_code[14] = 0x24840080; @@ -548,8 +548,8 @@ static int pic32mx_write_block(struct flash_bank *bank, const uint8_t *buffer, break; } - buf_set_u32(reg_params[0].value, 0, 32, Virt2Phys(source->address)); - buf_set_u32(reg_params[1].value, 0, 32, Virt2Phys(address)); + buf_set_u32(reg_params[0].value, 0, 32, virt2phys(source->address)); + buf_set_u32(reg_params[1].value, 0, 32, virt2phys(address)); buf_set_u32(reg_params[2].value, 0, 32, thisrun_count + row_offset / 4); retval = target_run_algorithm(target, 0, NULL, 3, reg_params, @@ -591,8 +591,7 @@ static int pic32mx_write_block(struct flash_bank *bank, const uint8_t *buffer, destroy_reg_param(®_params[1]); destroy_reg_param(®_params[2]); - if (new_buffer != NULL) - free(new_buffer); + free(new_buffer); return retval; } @@ -600,7 +599,7 @@ static int pic32mx_write_word(struct flash_bank *bank, uint32_t address, uint32_ { struct target *target = bank->target; - target_write_u32(target, PIC32MX_NVMADDR, Virt2Phys(address)); + target_write_u32(target, PIC32MX_NVMADDR, virt2phys(address)); target_write_u32(target, PIC32MX_NVMDATA, word); return pic32mx_nvm_exec(bank, NVMCON_OP_WORD_PROG, 5); @@ -700,7 +699,7 @@ static int pic32mx_probe(struct flash_bank *bank) uint32_t device_id; int page_size; - pic32mx_info->probed = 0; + pic32mx_info->probed = false; device_id = ejtag_info->idcode; LOG_INFO("device id = 0x%08" PRIx32 " (manuf 0x%03x dev 0x%04x, ver 0x%02x)", @@ -718,14 +717,14 @@ static int pic32mx_probe(struct flash_bank *bank) for (i = 0; pic32mx_devs[i].name != NULL; i++) { if (pic32mx_devs[i].devid == (device_id & 0x0fffffff)) { if ((pic32mx_devs[i].name[0] == '1') || (pic32mx_devs[i].name[0] == '2')) - pic32mx_info->dev_type = (pic32mx_devs[i].name[1] == '7') ? MX_17x_27x : MX_1xx_2xx; + pic32mx_info->dev_type = (pic32mx_devs[i].name[1] == '7') ? MX_17X_27X : MX_1XX_2XX; break; } } switch (pic32mx_info->dev_type) { - case MX_1xx_2xx: - case MX_17x_27x: + case MX_1XX_2XX: + case MX_17X_27X: page_size = 1024; break; default: @@ -733,7 +732,7 @@ static int pic32mx_probe(struct flash_bank *bank) break; } - if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) { + if (virt2phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) { /* 0x1FC00000: Boot flash size */ #if 0 /* for some reason this register returns 8k for the boot bank size @@ -746,8 +745,8 @@ static int pic32mx_probe(struct flash_bank *bank) #else /* fixed 12k boot bank - see comments above */ switch (pic32mx_info->dev_type) { - case MX_1xx_2xx: - case MX_17x_27x: + case MX_1XX_2XX: + case MX_17X_27X: num_pages = (3 * 1024); break; default: @@ -759,8 +758,8 @@ static int pic32mx_probe(struct flash_bank *bank) /* read the flash size from the device */ if (target_read_u32(target, PIC32MX_BMXPFMSZ, &num_pages) != ERROR_OK) { switch (pic32mx_info->dev_type) { - case MX_1xx_2xx: - case MX_17x_27x: + case MX_1XX_2XX: + case MX_17X_27X: LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 32k flash"); num_pages = (32 * 1024); break; @@ -772,12 +771,9 @@ static int pic32mx_probe(struct flash_bank *bank) } } - LOG_INFO("flash size = %" PRId32 "kbytes", num_pages / 1024); + LOG_INFO("flash size = %" PRIu32 "kbytes", num_pages / 1024); - if (bank->sectors) { - free(bank->sectors); - bank->sectors = NULL; - } + free(bank->sectors); /* calculate numbers of pages */ num_pages /= page_size; @@ -792,7 +788,7 @@ static int pic32mx_probe(struct flash_bank *bank) bank->sectors[i].is_protected = 1; } - pic32mx_info->probed = 1; + pic32mx_info->probed = true; return ERROR_OK; } @@ -805,37 +801,35 @@ static int pic32mx_auto_probe(struct flash_bank *bank) return pic32mx_probe(bank); } -static int pic32mx_info(struct flash_bank *bank, char *buf, int buf_size) +static int pic32mx_info(struct flash_bank *bank, struct command_invocation *cmd) { struct target *target = bank->target; struct mips32_common *mips32 = target->arch_info; struct mips_ejtag *ejtag_info = &mips32->ejtag_info; uint32_t device_id; - int printed = 0, i; device_id = ejtag_info->idcode; if (((device_id >> 1) & 0x7ff) != PIC32MX_MANUF_ID) { - snprintf(buf, buf_size, - "Cannot identify target as a PIC32MX family (manufacturer 0x%03d != 0x%03d)\n", - (unsigned)((device_id >> 1) & 0x7ff), - PIC32MX_MANUF_ID); + command_print_sameline(cmd, + "Cannot identify target as a PIC32MX family (manufacturer 0x%03x != 0x%03x)\n", + (unsigned)((device_id >> 1) & 0x7ff), + PIC32MX_MANUF_ID); return ERROR_FLASH_OPERATION_FAILED; } + int i; for (i = 0; pic32mx_devs[i].name != NULL; i++) { if (pic32mx_devs[i].devid == (device_id & 0x0fffffff)) { - printed = snprintf(buf, buf_size, "PIC32MX%s", pic32mx_devs[i].name); + command_print_sameline(cmd, "PIC32MX%s", pic32mx_devs[i].name); break; } } if (pic32mx_devs[i].name == NULL) - printed = snprintf(buf, buf_size, "Unknown"); + command_print_sameline(cmd, "Unknown"); - buf += printed; - buf_size -= printed; - snprintf(buf, buf_size, " Ver: 0x%02x", + command_print_sameline(cmd, " Ver: 0x%02x", (unsigned)((device_id >> 28) & 0xf)); return ERROR_OK; @@ -920,7 +914,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command) mchip_cmd = MCHP_STATUS; mips_ejtag_drscan_8(ejtag_info, &mchip_cmd); if (timeout-- == 0) { - LOG_DEBUG("timeout waiting for unlock: 0x%" PRIx32 "", mchip_cmd); + LOG_DEBUG("timeout waiting for unlock: 0x%" PRIx8 "", mchip_cmd); break; } alive_sleep(1);