X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fds390%2Fralloc.c;h=3fab7c2dc497c4f3e161e0c9d050642ee650a617;hb=4660c9268ba19a8ff964673539cb9286e2574d38;hp=871e761ff8a1070b4c8d7c7fd3c10a1690d61e70;hpb=db92e39300e428ae3aa9c4ca6babbbda09b17748;p=fw%2Fsdcc diff --git a/src/ds390/ralloc.c b/src/ds390/ralloc.c index 871e761f..3fab7c2d 100644 --- a/src/ds390/ralloc.c +++ b/src/ds390/ralloc.c @@ -380,13 +380,11 @@ noOverLap (set * itmpStack, symbol * fsym) { symbol *sym; - for (sym = setFirstItem (itmpStack); sym; sym = setNextItem (itmpStack)) { - if (sym->liveTo > fsym->liveFrom) + if (sym->liveTo >= fsym->liveFrom) return 0; - } return 1; @@ -1149,19 +1147,21 @@ serialRegAssign (eBBlock ** ebbs, int count) /* if it has a spillocation & is used less than all other live ranges then spill this */ - if (willCS && sym->usl.spillLoc) - { - - symbol *leastUsed = - leastUsedLR (liveRangesWith (spillable, - allLRs, - ebbs[i], - ic)); - if (leastUsed && - leastUsed->used > sym->used) - { - spillThis (sym); - continue; + if (willCS) { + if (sym->usl.spillLoc) { + symbol *leastUsed = leastUsedLR (liveRangesWith (spillable, + allLRs, ebbs[i], ic)); + if (leastUsed && leastUsed->used > sym->used) { + spillThis (sym); + continue; + } + } else { + /* if none of the liveRanges have a spillLocation then better + to spill this one than anything else already assigned to registers */ + if (liveRangesWith(spillable,noSpilLoc,ebbs[i],ic)) { + spillThis (sym); + continue; + } } } @@ -2021,7 +2021,7 @@ static bool isBitwiseOptimizable (iCode * ic) { sym_link *ltype = getSpec (operandType (IC_LEFT (ic))); - // jwk sym_link *rtype = getSpec (operandType (IC_RIGHT (ic))); + sym_link *rtype = getSpec (operandType (IC_RIGHT (ic))); /* bitwise operations are considered optimizable under the following conditions (Jean-Louis VERN) @@ -2208,7 +2208,10 @@ packForPush (iCode * ic, eBBlock * ebp) for (lic = ic; lic != dic ; lic = lic->prev) { if (bitVectBitValue(dbv,lic->key)) return ; } - + /* extend the live range of replaced operand if needed */ + if (OP_SYMBOL(IC_RIGHT(dic))->liveTo < ic->seq) { + OP_SYMBOL(IC_RIGHT(dic))->liveTo = ic->seq; + } /* we now we know that it has one & only one def & use and the that the definition is an assignment */ IC_LEFT (ic) = IC_RIGHT (dic);