X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fdrivers%2Fao_cc1120.h;h=a1d78c01b1d80b145262ad7f04f9bae5750cb1a2;hb=7b275ddfe20f54857d7d1abb98607c406b678090;hp=67c0a1b833678c0f4c202f905f94c84285af0e6d;hpb=1489263b895a2a825e29d0560c9b1dbba8a3f431;p=fw%2Faltos diff --git a/src/drivers/ao_cc1120.h b/src/drivers/ao_cc1120.h index 67c0a1b8..a1d78c01 100644 --- a/src/drivers/ao_cc1120.h +++ b/src/drivers/ao_cc1120.h @@ -110,38 +110,258 @@ #define CC1120_SYNC1 0x06 #define CC1120_SYNC0 0x07 #define CC1120_SYNC_CFG1 0x08 +#define CC1120_SYNC_CFG1_DEM_CFG 5 +#define CC1120_SYNC_CFG1_DEM_CFG_PQT_GATING_DISABLED 0 +#define CC1120_SYNC_CFG1_DEM_CFG_PQT_GATING_ENABLED 2 +#define CC1120_SYNC_CFG1_DEM_CFG_MASK 0x7 + +#define CC1120_SYNC_CFG1_SYNC_THR 0 +#define CC1120_SYNC_CFG1_SYNC_MASK 0x1f + #define CC1120_SYNC_CFG0 0x09 +#define CC1120_SYNC_CFG0_SYNC_MODE 2 +#define CC1120_SYNC_CFG0_SYNC_MODE_NONE 0 +#define CC1120_SYNC_CFG0_SYNC_MODE_11_BITS 1 +#define CC1120_SYNC_CFG0_SYNC_MODE_16_BITS 2 +#define CC1120_SYNC_CFG0_SYNC_MODE_18_BITS 3 +#define CC1120_SYNC_CFG0_SYNC_MODE_24_BITS 4 +#define CC1120_SYNC_CFG0_SYNC_MODE_32_BITS 5 +#define CC1120_SYNC_CFG0_SYNC_MODE_16H_BITS 6 +#define CC1120_SYNC_CFG0_SYNC_MODE_16D_BITS 7 +#define CC1120_SYNC_CFG0_SYNC_MODE_MASK 7 +#define CC1120_SYNC_CFG0_SYNC_NUM_ERROR 0 +#define CC1120_SYNC_CFG0_SYNC_NUM_ERROR_0 0 +#define CC1120_SYNC_CFG0_SYNC_NUM_ERROR_2 1 +#define CC1120_SYNC_CFG0_SYNC_NUM_ERROR_DISABLED 3 +#define CC1120_SYNC_CFG0_SYNC_NUM_ERROR_MASK 3 + #define CC1120_DEVIATION_M 0x0a #define CC1120_MODCFG_DEV_E 0x0b +#define CC1120_MODCFG_DEV_E_MODEM_MODE 6 +#define CC1120_MODCFG_DEV_E_MODEM_MODE_NORMAL 0 +#define CC1120_MODCFG_DEV_E_MODEM_MODE_DSSS_REPEAT 1 +#define CC1120_MODCFG_DEV_E_MODEM_MODE_DSSS_PN 2 +#define CC1120_MODCFG_DEV_E_MODEM_MODE_MASK 3 +#define CC1120_MODCFG_DEV_E_MOD_FORMAT 3 +#define CC1120_MODCFG_DEV_E_MOD_FORMAT_2_FSK 0 +#define CC1120_MODCFG_DEV_E_MOD_FORMAT_2_GFSK 1 +#define CC1120_MODCFG_DEV_E_MOD_FORMAT_ASK_OOK 3 +#define CC1120_MODCFG_DEV_E_MOD_FORMAT_4_FSK 4 +#define CC1120_MODCFG_DEV_E_MOD_FORMAT_4_GFSK 5 +#define CC1120_MODCFG_DEV_E_MOD_FORMAT_SC_MSK_UNSHAPED 6 +#define CC1120_MODCFG_DEV_E_MOD_FORMAT_SC_MSK_SHAPED 7 +#define CC1120_MODCFG_DEV_E_MOD_FORMAT_MASK 7 +#define CC1120_MODCFG_DEV_E_DEV_E 0 +#define CC1120_MODCFG_DEV_E_DEV_E_MASK 7 + #define CC1120_DCFILT_CFG 0x0c #define CC1120_PREAMBLE_CFG1 0x0d +#define CC1120_PREAMBLE_CFG1_NUM_PREAMBLE 2 +#define CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_NONE 0 +#define CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_0_5_BYTE 1 +#define CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_1_BYTE 2 +#define CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_1_5_BYTE 3 +#define CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_2_BYTES 4 +#define CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_3_BYTES 5 +#define CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_4_BYTES 6 +#define CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_5_BYTES 7 +#define CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_6_BYTES 8 +#define CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_7_BYTES 9 +#define CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_8_BYTES 10 +#define CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_12_BYTES 11 +#define CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_24_BYTES 12 +#define CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_30_BYTES 13 +#define CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_MASK 0xf + +#define CC1120_PREAMBLE_CFG1_PREAMBLE_WORD 0 +#define CC1120_PREAMBLE_CFG1_PREAMBLE_WORD_AA 0 +#define CC1120_PREAMBLE_CFG1_PREAMBLE_WORD_55 1 +#define CC1120_PREAMBLE_CFG1_PREAMBLE_WORD_33 2 +#define CC1120_PREAMBLE_CFG1_PREAMBLE_WORD_CC 3 +#define CC1120_PREAMBLE_CFG1_PREAMBLE_WORD_MASK 3 + #define CC1120_PREAMBLE_CFG0 0x0e +#define CC1120_PREAMBLE_CFG0_PQT_EN 5 +#define CC1120_PREAMBLE_CFG0_PQT_VALID_TIMEOUT 4 +#define CC1120_PREAMBLE_CFG0_PQT 0 +#define CC1120_PREAMBLE_CFG0_PQT_MASK 0xf + #define CC1120_FREQ_IF_CFG 0x0f #define CC1120_IQIC 0x10 #define CC1120_CHAN_BW 0x11 #define CC1120_MDMCFG1 0x12 +#define CC1120_MDMCFG1_CARRIER_SENSE_GATE 7 +#define CC1120_MDMCFG1_FIFO_EN 6 +#define CC1120_MDMCFG1_MANCHESTER_EN 5 +#define CC1120_MDMCFG1_INVERT_DATA_EN 4 +#define CC1120_MDMCFG1_COLLISION_DETECT_EN 3 +#define CC1120_MDMCFG1_DVGA_GAIN 1 +#define CC1120_MDMCFG1_DVGA_GAIN_0 0 +#define CC1120_MDMCFG1_DVGA_GAIN_3 1 +#define CC1120_MDMCFG1_DVGA_GAIN_6 2 +#define CC1120_MDMCFG1_DVGA_GAIN_9 3 +#define CC1120_MDMCFG1_DVGA_GAIN_MASK 3 +#define CC1120_MDMCFG1_SINGLE_ADC_EN 0 + #define CC1120_MDMCFG0 0x13 #define CC1120_DRATE2 0x14 +#define CC1120_DRATE2_DATARATE_E 4 +#define CC1120_DRATE2_DATARATE_E_MASK 0xf +#define CC1120_DRATE2_DATARATE_M_19_16 0 +#define CC1120_DRATE2_DATARATE_M_19_16_MASK 0xf + #define CC1120_DRATE1 0x15 #define CC1120_DRATE0 0x16 #define CC1120_AGC_REF 0x17 #define CC1120_AGC_CS_THR 0x18 #define CC1120_AGC_GAIN_ADJUST 0x19 + #define CC1120_AGC_CFG3 0x1a +#define CC1120_AGC_CFG3_RSSI_STEP_THR 7 +#define CC1120_AGC_CFG3_AGC_MIN_GAIN 0 +#define CC1120_AGC_CFG3_AGC_MIN_GAIN_MASK 0x1f + #define CC1120_AGC_CFG2 0x1b +#define CC1120_AGC_CFG2_START_PREVIOUS_GAIN_EN 7 +#define CC1120_AGC_CFG2_FE_PERFORMANCE_MODE 5 +#define CC1120_AGC_CFG2_FE_PERFORMANCE_MODE_OPTIMIZE_LINEARITY 0 +#define CC1120_AGC_CFG2_FE_PERFORMANCE_MODE_NORMAL 1 +#define CC1120_AGC_CFG2_FE_PERFORMANCE_MODE_LOW_POWER 2 +#define CC1120_AGC_CFG2_FE_PERFORMANCE_MODE_MASK 3 +#define CC1120_AGC_CFG2_AGC_MAX_GAIN 0 +#define CC1120_AGC_CFG2_AGC_MAX_MASK 0x1f + #define CC1120_AGC_CFG1 0x1c +#define CC1120_AGC_CFG1_AGC_SYNC_BEHAVIOR 5 +#define CC1120_AGC_CFG1_AGC_SYNC_BEHAVIOR_UPDATE_AGC_UPDATE_RSSI 0 +#define CC1120_AGC_CFG1_AGC_SYNC_BEHAVIOR_FREEZE_AGC_UPDATE_RSSI 1 +#define CC1120_AGC_CFG1_AGC_SYNC_BEHAVIOR_UPDATE_AGC_UPDATE_RSSI_SLOW 2 +#define CC1120_AGC_CFG1_AGC_SYNC_BEHAVIOR_FREEZE_AGC_FREEZE_RSSI 3 +#define CC1120_AGC_CFG1_AGC_SYNC_BEHAVIOR_UPDATE_AGC_UPDATE_RSSI_4 4 +#define CC1120_AGC_CFG1_AGC_SYNC_BEHAVIOR_FREEZE_AGC_FREEZE_RSSI_5 5 +#define CC1120_AGC_CFG1_AGC_SYNC_BEHAVIOR_UPDATE_AGC_UPDATE_RSSI_SLOW_6 6 +#define CC1120_AGC_CFG1_AGC_SYNC_BEHAVIOR_FREEZE_AGC_FREEZE_RSSI_7 7 +#define CC1120_AGC_CFG1_AGC_WIN_SIZE 2 +#define CC1120_AGC_CFG1_AGC_WIN_SIZE_8 0 +#define CC1120_AGC_CFG1_AGC_WIN_SIZE_16 1 +#define CC1120_AGC_CFG1_AGC_WIN_SIZE_32 2 +#define CC1120_AGC_CFG1_AGC_WIN_SIZE_64 3 +#define CC1120_AGC_CFG1_AGC_WIN_SIZE_128 4 +#define CC1120_AGC_CFG1_AGC_WIN_SIZE_256 5 +#define CC1120_AGC_CFG1_AGC_WIN_SIZE_MASK 7 +#define CC1120_AGC_CFG1_AGC_SETTLE_WAIT 0 +#define CC1120_AGC_CFG1_AGC_SETTLE_WAIT_24 0 +#define CC1120_AGC_CFG1_AGC_SETTLE_WAIT_32 1 +#define CC1120_AGC_CFG1_AGC_SETTLE_WAIT_40 2 +#define CC1120_AGC_CFG1_AGC_SETTLE_WAIT_48 3 + #define CC1120_AGC_CFG0 0x1d + +#define CC1120_AGC_CFG0_AGC_HYST_LEVEL 6 +#define CC1120_AGC_CFG0_AGC_HYST_LEVEL_2 0 +#define CC1120_AGC_CFG0_AGC_HYST_LEVEL_4 1 +#define CC1120_AGC_CFG0_AGC_HYST_LEVEL_7 2 +#define CC1120_AGC_CFG0_AGC_HYST_LEVEL_10 3 + +#define CC1120_AGC_CFG0_AGC_SLEWRATE_LIMIT 4 +#define CC1120_AGC_CFG0_AGC_SLEWRATE_LIMIT_60 0 +#define CC1120_AGC_CFG0_AGC_SLEWRATE_LIMIT_30 1 +#define CC1120_AGC_CFG0_AGC_SLEWRATE_LIMIT_18 2 +#define CC1120_AGC_CFG0_AGC_SLEWRATE_LIMIT_9 3 + +#define CC1120_AGC_CFG0_RSSI_VALID_CNT 2 +#define CC1120_AGC_CFG0_RSSI_VALID_CNT_2 0 +#define CC1120_AGC_CFG0_RSSI_VALID_CNT_3 1 +#define CC1120_AGC_CFG0_RSSI_VALID_CNT_5 2 +#define CC1120_AGC_CFG0_RSSI_VALID_CNT_9 3 + +#define CC1120_AGC_CFG0_AGC_ASK_DECAY 0 +#define CC1120_AGC_CFG0_AGC_ASK_DECAY_1_16 0 +#define CC1120_AGC_CFG0_AGC_ASK_DECAY_1_32 1 +#define CC1120_AGC_CFG0_AGC_ASK_DECAY_1_64 2 +#define CC1120_AGC_CFG0_AGC_ASK_DECAY_1_128 3 + #define CC1120_FIFO_CFG 0x1e +#define CC1120_FIFO_CFG_CRC_AUTOFLUSH 7 +#define CC1120_FIFO_CFG_FIFO_THR 0 #define CC1120_DEV_ADDR 0x1f #define CC1120_SETTLING_CFG 0x20 +#define CC1120_SETTLING_CFG_FS_AUTOCAL 3 +#define CC1120_SETTLING_CFG_FS_AUTOCAL_NEVER 0 +#define CC1120_SETTLING_CFG_FS_AUTOCAL_IDLE_TO_ON 1 +#define CC1120_SETTLING_CFG_FS_AUTOCAL_ON_TO_IDLE 2 +#define CC1120_SETTLING_CFG_FS_AUTOCAL_EVERY_4TH_TIME 3 +#define CC1120_SETTLING_CFG_FS_AUTOCAL_MASK 3 +#define CC1120_SETTLING_CFG_LOCK_TIME 1 +#define CC1120_SETTLING_CFG_LOCK_TIME_50_20 0 +#define CC1120_SETTLING_CFG_LOCK_TIME_70_30 1 +#define CC1120_SETTLING_CFG_LOCK_TIME_100_40 2 +#define CC1120_SETTLING_CFG_LOCK_TIME_150_60 3 +#define CC1120_SETTLING_CFG_LOCK_TIME_MASK 3 +#define CC1120_SETTLING_CFG_FSREG_TIME 0 +#define CC1120_SETTLING_CFG_FSREG_TIME_30 0 +#define CC1120_SETTLING_CFG_FSREG_TIME_60 1 +#define CC1120_SETTLING_CFG_FSREG_TIME_MASK 1 + #define CC1120_FS_CFG 0x21 +#define CC1120_FS_CFG_LOCK_EN 4 +#define CC1120_FS_CFG_FSD_BANDSELECT 0 +#define CC1120_FS_CFG_FSD_BANDSELECT_820_960 2 +#define CC1120_FS_CFG_FSD_BANDSELECT_410_480 4 +#define CC1120_FS_CFG_FSD_BANDSELECT_273_320 6 +#define CC1120_FS_CFG_FSD_BANDSELECT_205_240 8 +#define CC1120_FS_CFG_FSD_BANDSELECT_164_192 10 +#define CC1120_FS_CFG_FSD_BANDSELECT_136_160 11 +#define CC1120_FS_CFG_FSD_BANDSELECT_MASK 0xf + #define CC1120_WOR_CFG1 0x22 #define CC1120_WOR_CFG0 0x23 #define CC1120_WOR_EVENT0_MSB 0x24 #define CC1120_WOR_EVENT0_LSB 0x25 #define CC1120_PKT_CFG2 0x26 +#define CC1120_PKT_CFG2_CCA_MODE 2 +#define CC1120_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR 0 +#define CC1120_PKT_CFG2_CCA_MODE_RSSI_THRESHOLD 1 +#define CC1120_PKT_CFG2_CCA_MODE_NOT_RECEIVING 2 +#define CC1120_PKT_CFG2_CCA_MODE_RSSI_OR_NOT 3 +#define CC1120_PKT_CFG2_CCA_MODE_RSSI_AND_ETSI_LBT 4 +#define CC1120_PKT_CFG2_CCA_MODE_MASK 7 +#define CC1120_PKT_CFG2_PKT_FORMAT 0 +#define CC1120_PKT_CFG2_PKT_FORMAT_NORMAL 0 +#define CC1120_PKT_CFG2_PKT_FORMAT_SYNCHRONOUS_SERIAL 1 +#define CC1120_PKT_CFG2_PKT_FORMAT_RANDOM 2 +#define CC1120_PKT_CFG2_PKT_FORMAT_TRANSPARENT_SERIAL 3 +#define CC1120_PKT_CFG2_PKT_FORMAT_MASK 3 + #define CC1120_PKT_CFG1 0x27 +#define CC1120_PKT_CFG1_WHITE_DATA 6 +#define CC1120_PKT_CFG1_ADDR_CHECK_CFG 4 +#define CC1120_PKT_CFG1_ADDR_CHECK_CFG_NONE 0 +#define CC1120_PKT_CFG1_ADDR_CHECK_CFG_CHECK 1 +#define CC1120_PKT_CFG1_ADDR_CHECK_CFG_00_BROADCAST 2 +#define CC1120_PKT_CFG1_ADDR_CHECK_CFG_00_FF_BROADCAST 3 +#define CC1120_PKT_CFG1_ADDR_CHECK_CFG_MASK 3 +#define CC1120_PKT_CFG1_CRC_CFG 2 +#define CC1120_PKT_CFG1_CRC_CFG_DISABLED 0 +#define CC1120_PKT_CFG1_CRC_CFG_CRC16_INIT_ONES 1 +#define CC1120_PKT_CFG1_CRC_CFG_CRC16_INIT_ZEROS 2 +#define CC1120_PKT_CFG1_CRC_CFG_MASK 3 +#define CC1120_PKT_CFG1_BYTE_SWAP_EN 1 +#define CC1120_PKT_CFG1_APPEND_STATUS 0 + #define CC1120_PKT_CFG0 0x28 +#define CC1120_PKT_CFG0_RESERVED7 7 +#define CC1120_PKT_CFG0_LENGTH_CONFIG 5 +#define CC1120_PKT_CFG0_LENGTH_CONFIG_FIXED 0 +#define CC1120_PKT_CFG0_LENGTH_CONFIG_VARIABLE 1 +#define CC1120_PKT_CFG0_LENGTH_CONFIG_INFINITE 2 +#define CC1120_PKT_CFG0_LENGTH_CONFIG_VARIABLE_5LSB 3 +#define CC1120_PKT_CFG0_LENGTH_CONFIG_MASK 3 +#define CC1120_PKT_CFG0_PKG_BIT_LEN 2 +#define CC1120_PKT_CFG0_PKG_BIT_LEN_MASK 7 +#define CC1120_PKT_CFG0_UART_MODE_EN 1 +#define CC1120_PKT_CFG0_UART_SWAP_EN 0 + #define CC1120_RFEND_CFG1 0x29 #define CC1120_RFEND_CFG0 0x2a #define CC1120_PA_CFG2 0x2b @@ -170,6 +390,8 @@ #define CC1120_DIRECT_FIFO 0x3e #define CC1120_FIFO 0x3f +#define CC1120_FIFO_SIZE 128 + /* Extended register space */ #define CC1120_EXTENDED_BIT 0x8000 @@ -182,6 +404,8 @@ #define CC1120_MARC_SPARE (CC1120_EXTENDED_BIT | 0x03) #define CC1120_ECG_CFG (CC1120_EXTENDED_BIT | 0x04) #define CC1120_SOFT_TX_DATA_CFG (CC1120_EXTENDED_BIT | 0x05) +#define CC1120_SOFT_TX_DATA_CFG_SYMBOL_MAP_CFG 5 +#define CC1120_SOFT_TX_DATA_CFG_SOFT_TX_DATA_EN 0 #define CC1120_EXT_CTRL (CC1120_EXTENDED_BIT | 0x06) #define CC1120_RCCAL_FINE (CC1120_EXTENDED_BIT | 0x07) #define CC1120_RCCAL_COARSE (CC1120_EXTENDED_BIT | 0x08) @@ -283,6 +507,20 @@ #define CC1120_RX_STATUS (CC1120_EXTENDED_BIT | 0x92) #define CC1120_TX_STATUS (CC1120_EXTENDED_BIT | 0x93) #define CC1120_MARC_STATUS1 (CC1120_EXTENDED_BIT | 0x94) +# define CC1120_MARC_STATUS1_NO_FAILURE 0 +# define CC1120_MARC_STATUS1_RX_TIMEOUT 1 +# define CC1120_MARC_STATUS1_RX_TERMINATION 2 +# define CC1120_MARC_STATUS1_EWOR_SYNC_LOST 3 +# define CC1120_MARC_STATUS1_MAXIMUM_LENGTH 4 +# define CC1120_MARC_STATUS1_ADDRESS 5 +# define CC1120_MARC_STATUS1_CRC 6 +# define CC1120_MARC_STATUS1_TX_FIFO_OVERFLOW 7 +# define CC1120_MARC_STATUS1_TX_FIFO_UNDERFLOW 8 +# define CC1120_MARC_STATUS1_RX_FIFO_OVERFLOW 9 +# define CC1120_MARC_STATUS1_RX_FIFO_UNDERFLOW 10 +# define CC1120_MARC_STATUS1_TX_ON_CCA_FAILED 11 +# define CC1120_MARC_STATUS1_TX_FINISHED 0x40 +# define CC1120_MARC_STATUS1_RX_FINISHED 0x80 #define CC1120_MARC_STATUS0 (CC1120_EXTENDED_BIT | 0x95) #define CC1120_PA_IFAMP_TEST (CC1120_EXTENDED_BIT | 0x96) #define CC1120_FSRF_TEST (CC1120_EXTENDED_BIT | 0x97)