X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fcc1111%2Fao_spi.c;h=52087fb4892dfd537e729cc8b65573a1baf37ba3;hb=7a0ed0ff4192060854d69e640de2c30105eb2f62;hp=1fa8e1282fe0374b2d6f745b366ac2b8d80bb763;hpb=2bce71eba9f44b6fcf64e307c8174824c3a0fb57;p=fw%2Faltos

diff --git a/src/cc1111/ao_spi.c b/src/cc1111/ao_spi.c
index 1fa8e128..52087fb4 100644
--- a/src/cc1111/ao_spi.c
+++ b/src/cc1111/ao_spi.c
@@ -38,8 +38,9 @@ static __xdata uint8_t ao_spi_const;
  * completion one byte before the transfer is actually complete
  */
 void
-ao_spi_send(void __xdata *block, uint16_t len) __reentrant
+ao_spi_send_bus(void __xdata *block, uint16_t len) __reentrant
 {
+#if !AO_SPI_SLAVE
 	ao_dma_set_transfer(ao_spi_dma_in_id,
 			    &U0DBUFXADDR,
 			    &ao_spi_const,
@@ -50,7 +51,7 @@ ao_spi_send(void __xdata *block, uint16_t len) __reentrant
 			    DMA_CFG1_SRCINC_0 |
 			    DMA_CFG1_DESTINC_0 |
 			    DMA_CFG1_PRIORITY_NORMAL);
-
+#endif
 	ao_dma_set_transfer(ao_spi_dma_out_id,
 			    block,
 			    &U0DBUFXADDR,
@@ -62,11 +63,18 @@ ao_spi_send(void __xdata *block, uint16_t len) __reentrant
 			    DMA_CFG1_DESTINC_0 |
 			    DMA_CFG1_PRIORITY_NORMAL);
 
+#if !AO_SPI_SLAVE
 	ao_dma_start(ao_spi_dma_in_id);
+#endif
 	ao_dma_start(ao_spi_dma_out_id);
 	ao_dma_trigger(ao_spi_dma_out_id);
+#if AO_SPI_SLAVE
+	__critical while (!ao_spi_dma_out_done)
+			   ao_sleep(&ao_spi_dma_out_done);
+#else
 	__critical while (!ao_spi_dma_in_done)
 		ao_sleep(&ao_spi_dma_in_done);
+#endif
 }
 
 /* Receive bytes over SPI.
@@ -76,7 +84,7 @@ ao_spi_send(void __xdata *block, uint16_t len) __reentrant
  * clocks the data coming in.
  */
 void
-ao_spi_recv(void __xdata *block, uint16_t len) __reentrant
+ao_spi_recv_bus(void __xdata *block, uint16_t len) __reentrant
 {
 	ao_dma_set_transfer(ao_spi_dma_in_id,
 			    &U0DBUFXADDR,
@@ -110,15 +118,45 @@ ao_spi_recv(void __xdata *block, uint16_t len) __reentrant
 }
 
 /*
- * Initialize USART0 for SPI using config alt 2
+ * USART0 SPI config alt 2	 (using this one)
  *
  * 	MO	P1_5
  * 	MI	P1_4
  * 	CLK	P1_3
+ *	CSS	P1_2
+ *
+ * USART0 SPI config alt 1
+ * 
+ *	MO	P0_3
+ *	MI	P0_2
+ *	CLK	P0_5
+ *	SS	P0_4
+ *
+ * USART1 SPI config alt 2
+ *
+ *	MO	P1_6
+ *	MI	P1_7
+ *	CLK	P1_5
+ *	SS	P1_4
  *
- * Chip select is the responsibility of the caller
+ * USART1 SPI config alt 1
+ *
+ *	MO	P0_4
+ *	MI	P0_5
+ *	CLK	P0_3
+ *	SS	P0_2
+ *
+ * Chip select is the responsibility of the caller in master mode
  */
 
+#if AO_SPI_SLAVE
+#define CSS	(1 << 2)
+#define UxCSR_DIRECTION	UxCSR_SLAVE
+#else
+#define CSS	0
+#define UxCSR_DIRECTION	UxCSR_MASTER
+#endif
+
 void
 ao_spi_init(void)
 {
@@ -131,7 +169,7 @@ ao_spi_init(void)
 	P2SEL = (P2SEL & ~P2SEL_PRI3P1_MASK) | P2SEL_PRI3P1_USART0;
 
 	/* Make the SPI pins be controlled by the USART peripheral */
-	P1SEL |= ((1 << 5) | (1 << 4) | (1 << 3));
+	P1SEL |= ((1 << 5) | (1 << 4) | (1 << 3) | CSS);
 
 	/* Set up OUT DMA */
 	ao_spi_dma_out_id = ao_dma_alloc(&ao_spi_dma_out_done);
@@ -143,7 +181,7 @@ ao_spi_init(void)
 	 *
 	 * SPI master mode
 	 */
-	U0CSR = (UxCSR_MODE_SPI | UxCSR_RE | UxCSR_MASTER);
+	U0CSR = (UxCSR_MODE_SPI | UxCSR_RE | UxCSR_DIRECTION);
 
 	/* Set the baud rate and signal parameters
 	 *