X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=sim%2Fucsim%2Fxa.src%2Finst_gen.cc;h=294a184ce28855db3b456a1e16033b1cfb9473b8;hb=598b42eac1d08810287fc5d39e47af9eb1a26632;hp=cd7f23525acd9639c8f52ab2c89a6d4f14e42201;hpb=cb5f8382078a59942b01cc19dc777ba8b5fa3e37;p=fw%2Fsdcc

diff --git a/sim/ucsim/xa.src/inst_gen.cc b/sim/ucsim/xa.src/inst_gen.cc
index cd7f2352..294a184c 100644
--- a/sim/ucsim/xa.src/inst_gen.cc
+++ b/sim/ucsim/xa.src/inst_gen.cc
@@ -177,7 +177,14 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
     break;
 
     case REG_DATA16 :
-      set_reg2( RI_F0, FUNC2( reg2(RI_F0), fetch2()) );
+      {
+        unsigned short dat = fetch2();
+        //unsigned short res;
+        //res = FUNC2( reg2(RI_F0), dat);
+        //set_reg2( RI_F0, res );
+//printf("reg_data16 code=%x dat=%x, res=%x\n", code, dat, res);
+        set_reg2( RI_F0, FUNC2( reg2(RI_F0), dat) );
+      }
     break;
 
     case IREGINC_DATA8 :