X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=sim%2Fucsim%2Fxa.src%2Finst.cc;h=c9f7d088558f0b2c9aa4c8555d20ea1ee8a31a84;hb=780eda408c43eb1674af2ea88e94bb2ed630f5d8;hp=dc991e08650e3b964301006d1e101183cbfbe31b;hpb=8948b938d1286b2a354b4c16c318052bf77b8019;p=fw%2Fsdcc diff --git a/sim/ucsim/xa.src/inst.cc b/sim/ucsim/xa.src/inst.cc index dc991e08..c9f7d088 100644 --- a/sim/ucsim/xa.src/inst.cc +++ b/sim/ucsim/xa.src/inst.cc @@ -30,11 +30,14 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA #include "ddconfig.h" +#include + // local #include "glob.h" #include "xacl.h" #include "regsxa.h" +#define NOTDONE_ASSERT { printf("**********Instr not done at %d!\n", __LINE__); } void cl_xa::store1(t_addr addr, unsigned char val) { @@ -96,7 +99,6 @@ bool cl_xa::get_bit(int bit) { } result = get_byte_direct(offset + (bit/8)) & (1 << (bit%8)); return result; - //return mem_direct[offset + (bit/8)] & (1 << (bit%8)); } void cl_xa::set_bit(int bit, int value) { @@ -111,10 +113,8 @@ void cl_xa::set_bit(int bit, int value) { i = get_byte_direct(offset + (bit/8)); if (value) { set_byte_direct(offset + (bit/8), i | (1 << (bit%8)) ); - //mem_direct[offset + (bit/8)] |= (1 << (bit%8)); } else { set_byte_direct(offset + (bit/8), i & ~(1 << (bit%8)) ); - //mem_direct[offset + (bit/8)] &= ~(1 << (bit%8)); } } @@ -147,6 +147,7 @@ int cl_xa::inst_ADDC(uint code, int operands) int cl_xa::inst_ADDS(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } @@ -160,18 +161,236 @@ int cl_xa::inst_AND(uint code, int operands) return(resGO); } +/* logical AND bit with Carry flag */ int cl_xa::inst_ANL(uint code, int operands) { + unsigned char flags; + unsigned short bitAddr = (code&0x03 << 8) + fetch(); + flags = get_psw(); + + if (flags & BIT_C) { + /* have work to do */ + switch(operands) { + case CY_BIT : + if (!get_bit(bitAddr)) { + set_psw(flags & ~BIT_C); + } + break; + + case CY_NOTBIT : + if (get_bit(bitAddr)) { + set_psw(flags & ~BIT_C); + } + break; + } + } + return(resGO); } +/* arithmetic shift left */ int cl_xa::inst_ASL(uint code, int operands) { + unsigned int dst, cnt; + unsigned char flags; + + /* ASL, dest, count + while (count != 0) + C = dest.80H; dest <<= 1; if sign chg then set V=1 + this is a confusing one... + */ + + flags = get_psw(); + flags &= ~BIT_ALL; /* clear these bits */ + + switch(operands) { + //{0,0xc150,0xf300,' ',2,ASL, REG_REG }, // ASL Rd, Rs 1 1 0 0 S S 0 1 d d d d s s s s + case REG_REG : + cnt = reg1(RI_0F) & 0x1f; + switch (code & 0xc00) { + case 0: // byte + dst = reg1(RI_F0); + dst <<= cnt; + set_reg1(RI_F0,dst); + if (dst & 0x100) + flags |= BIT_C; + if ((dst & 0xff) == 0) + flags |= BIT_Z; + break; + case 1: // word + dst = reg2(RI_F0); + dst <<= cnt; + set_reg2(RI_F0,dst); + if (dst & 0x10000) + flags |= BIT_C; + if ((dst & 0xffff) == 0) + flags |= BIT_Z; + break; + case 2: // ? + // not really sure about the encoding here.. + NOTDONE_ASSERT; + break; + case 3: // dword + //dst = reg4(RI_F0); + dst = reg2(RI_F0) | (reg2(RI_F0 + 2) << 16); + if ((cnt != 0) && (dst & (0x80000000 >> (cnt-1)))) { + flags |= BIT_C; + } + dst <<= cnt; + set_reg2(RI_F0,dst & 0xffff); + set_reg2(RI_F0+2, (dst>>16) & 0xffff); + if (dst == 0) + flags |= BIT_Z; + break; + } + break; + + case REG_DATA4 : + case REG_DATA5 : + switch (code & 0xc00) { + case 0: // byte + dst = reg1(RI_F0); + cnt = operands & 0x0f; + dst <<= cnt; + set_reg1(RI_F0,dst); + if (dst & 0x100) + flags |= BIT_C; + if ((dst & 0xff) == 0) + flags |= BIT_Z; + break; + case 1: // word + dst = reg2(RI_F0); + cnt = operands & 0x0f; + dst <<= cnt; + set_reg2(RI_F0,dst); + if (dst & 0x10000) + flags |= BIT_C; + if ((dst & 0xffff) == 0) + flags |= BIT_Z; + break; + case 2: // ? + // not really sure about the encoding here.. + NOTDONE_ASSERT; + break; + case 3: // dword + dst = reg1(RI_F0 & 0xe); + cnt = operands & 0x1f; + if ((cnt != 0) && (dst & (0x80000000 >> (cnt-1)))) { + flags |= BIT_C; + } + dst <<= cnt; + set_reg2(RI_F0,dst & 0xffff); + set_reg2(RI_F0+2, (dst>>16) & 0xffff); + if (dst == 0) + flags |= BIT_Z; + break; + } + break; + } + set_psw(flags); + return(resGO); } +/* arithmetic shift right */ int cl_xa::inst_ASR(uint code, int operands) { + unsigned int dst, cnt; + unsigned char flags; + + /* ASR, dest, count + while (count != 0) + C = dest.0; dest >>= 1; + this is a confusing one... + */ + + flags = get_psw(); + flags &= ~BIT_ALL; /* clear these bits */ + + switch(operands) { + case REG_REG : + cnt = reg1(RI_0F) & 0x1f; + switch (code & 0xc00) { + case 0: // byte + dst = reg1(RI_F0); + if ((cnt != 0) && (dst & (0x00000001 << (cnt-1)))) + flags |= BIT_C; + if (dst & 0x01) + flags |= BIT_C; + dst >>= cnt; + set_reg1(RI_F0,dst); + if ((dst & 0xff) == 0) + flags |= BIT_Z; + break; + case 1: // word + dst = reg2(RI_F0); + if ((cnt != 0) && (dst & (0x00000001 << (cnt-1)))) + flags |= BIT_C; + dst >>= cnt; + set_reg2(RI_F0,dst); + if ((dst & 0xffff) == 0) + flags |= BIT_Z; + break; + case 2: // ? + // not really sure about the encoding here.. + NOTDONE_ASSERT; + break; + case 3: // dword + dst = reg2(RI_F0) | (reg2(RI_F0 + 2) << 16); + if ((cnt != 0) && (dst & (0x00000001 << (cnt-1)))) + flags |= BIT_C; + dst >>= cnt; + set_reg2(RI_F0,dst & 0xffff); + set_reg2(RI_F0+2, (dst>>16) & 0xffff); + if (dst == 0) + flags |= BIT_Z; + break; + } + break; + + case REG_DATA4 : + case REG_DATA5 : + switch (code & 0xc00) { + case 0: // byte + dst = reg1(RI_F0); + cnt = operands & 0x0f; + if ((cnt != 0) && (dst & (0x00000001 << (cnt-1)))) + flags |= BIT_C; + dst >>= cnt; + set_reg1(RI_F0,dst); + if ((dst & 0xff) == 0) + flags |= BIT_Z; + break; + case 1: // word + dst = reg2(RI_F0); + cnt = operands & 0x0f; + if ((cnt != 0) && (dst & (0x00000001 << (cnt-1)))) + flags |= BIT_C; + dst >>= cnt; + set_reg2(RI_F0,dst); + if ((dst & 0xffff) == 0) + flags |= BIT_Z; + break; + case 2: // ? + // not really sure about the encoding here.. + NOTDONE_ASSERT; + break; + case 3: // dword + dst = reg1(RI_F0 & 0xe); + cnt = operands & 0x1f; + if ((cnt != 0) && (dst & (0x00000001 << (cnt-1)))) + flags |= BIT_C; + dst >>= cnt; + set_reg2(RI_F0,dst & 0xffff); + set_reg2(RI_F0+2, (dst>>16) & 0xffff); + if (dst == 0) + flags |= BIT_Z; + break; + } + break; + } + set_psw(flags); + return(resGO); } @@ -234,6 +453,7 @@ int cl_xa::inst_BGT(uint code, int operands) } int cl_xa::inst_BKPT(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } int cl_xa::inst_BL(uint code, int operands) @@ -431,14 +651,17 @@ int cl_xa::inst_CMP(uint code, int operands) } int cl_xa::inst_CPL(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } int cl_xa::inst_DA(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } int cl_xa::inst_DIV(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } @@ -488,11 +711,13 @@ int cl_xa::inst_DJNZ(uint code, int operands) int cl_xa::inst_FCALL(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } int cl_xa::inst_FJMP(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } @@ -507,6 +732,12 @@ int cl_xa::inst_JB(uint code, int operands) } int cl_xa::inst_JBC(uint code, int operands) { + short bitAddr=((code&0x3)<<8) + fetch1(); + short jmpAddr = (fetch1() * 2); + if (get_bit(bitAddr)) { + PC = (PC+jmpAddr)&0xfffffe; + } + set_bit(bitAddr,0); return(resGO); } int cl_xa::inst_JNB(uint code, int operands) @@ -517,7 +748,6 @@ int cl_xa::inst_JNB(uint code, int operands) PC = (PC+jmpAddr)&0xfffffe; } return(resGO); - return(resGO); } int cl_xa::inst_JMP(uint code, int operands) { @@ -558,10 +788,25 @@ int cl_xa::inst_JZ(uint code, int operands) } int cl_xa::inst_LEA(uint code, int operands) { + switch (operands) { + case REG_REGOFF8: + { + char offset=fetch1(); + set_reg2(RI_70, reg2(RI_07)+offset); + break; + } + case REG_REGOFF16: + { + short offset=fetch2(); + set_reg2(RI_70, reg2(RI_07)+offset); + break; + } + } return(resGO); } int cl_xa::inst_LSR(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } int cl_xa::inst_MOV(uint code, int operands) @@ -632,18 +877,22 @@ int cl_xa::inst_MOVC(uint code, int operands) } int cl_xa::inst_MOVS(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } int cl_xa::inst_MOVX(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } int cl_xa::inst_MUL(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } int cl_xa::inst_NEG(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } int cl_xa::inst_NOP(uint code, int operands) @@ -652,6 +901,7 @@ int cl_xa::inst_NOP(uint code, int operands) } int cl_xa::inst_NORM(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } int cl_xa::inst_OR(uint code, int operands) @@ -666,6 +916,7 @@ int cl_xa::inst_OR(uint code, int operands) int cl_xa::inst_ORL(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } @@ -807,6 +1058,7 @@ int cl_xa::inst_PUSH(uint code, int operands) } int cl_xa::inst_RESET(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } int cl_xa::inst_RET(uint code, int operands) @@ -846,18 +1098,22 @@ int cl_xa::inst_RETI(uint code, int operands) } int cl_xa::inst_RL(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } int cl_xa::inst_RLC(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } int cl_xa::inst_RR(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } int cl_xa::inst_RRC(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } int cl_xa::inst_SETB(uint code, int operands) @@ -919,6 +1175,7 @@ int cl_xa::inst_TRAP(uint code, int operands) int cl_xa::inst_XCH(uint code, int operands) { + NOTDONE_ASSERT; return(resGO); } int cl_xa::inst_XOR(uint code, int operands)