X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=sim%2Fucsim%2Fxa.src%2Fglob.cc;h=e17c6b5462355f0406bba58f3d0d99354855d7c7;hb=bb226788dab3832b0ec0cda70874ce3fce4eebc6;hp=21e0a775b8d5b8d634f482b564a62611126ee2e2;hpb=8948b938d1286b2a354b4c16c318052bf77b8019;p=fw%2Fsdcc diff --git a/sim/ucsim/xa.src/glob.cc b/sim/ucsim/xa.src/glob.cc index 21e0a775..e17c6b54 100644 --- a/sim/ucsim/xa.src/glob.cc +++ b/sim/ucsim/xa.src/glob.cc @@ -202,14 +202,14 @@ struct xa_dis_entry disass_xa[]= { {0,0x9605,0xff8f,' ',4, AND,DIRECT_DATA8 }, // AND direct, #data8 1 0 0 1 0 1 1 0 0 b b b 0 1 0 1 {0,0x9e05,0xff8f,' ',5, AND,DIRECT_DATA16 }, // AND direct, #data16 1 0 0 1 0 1 1 0 1 b b b 0 1 0 1 - {0,0x0840,0xfffc,' ',2,ANL, C_BIT }, // ANL C, bit 0 0 0 0 1 0 0 0 0 1 0 0 0 0 b b - {0,0x0850,0xfffc,' ',2,ANL, C_NOTBIT }, // ANL C, /bit 0 0 0 0 1 0 0 0 0 1 0 1 0 0 b b + {0,0x0840,0xfffc,' ',3,ANL, CY_BIT }, // ANL C, bit 0 0 0 0 1 0 0 0 0 1 0 0 0 0 b b lsbbit + {0,0x0850,0xfffc,' ',3,ANL, CY_NOTBIT }, // ANL C, /bit 0 0 0 0 1 0 0 0 0 1 0 1 0 0 b b lsbbit {0,0xc150,0xf300,' ',2,ASL, REG_REG }, // ASL Rd, Rs 1 1 0 0 S S 0 1 d d d d s s s s {0,0xdd00,0xff00,' ',2,ASL, REG_DATA5 }, // ASL Rd, #data5 (dword) 1 1 0 1 1 1 0 1 d d d #data5 - {0,0xd100,0xf300,' ',2,ASL, REG_DATA4 }, // ASL Rd, #data4 1 1 0 1 S S 0 1 d d d d #data4 + {0,0xd100,0xf700,' ',2,ASL, REG_DATA4 }, // ASL Rd, #data4 1 1 0 1 S S 0 1 d d d d #data4 {0,0xc250,0xf300,' ',2,ASR, REG_REG }, // ASR Rd, Rs 1 1 0 0 S S 1 0 d d d d s s s s {0,0xde00,0xff00,' ',2,ASR, REG_DATA5 }, // ASR Rd, #data5 (dword) 1 1 0 1 1 1 1 0 d d d #data5 - {0,0xd200,0xf300,' ',2,ASR, REG_DATA4 }, // ASR Rd, #data4 1 1 0 1 S S 1 0 d d d d #data4 + {0,0xd200,0xf700,' ',2,ASR, REG_DATA4 }, // ASR Rd, #data4 1 1 0 1 S S 1 0 d d d d #data4 {1,0xf000,0xff00,' ',2,BCC, REL8 }, // BCC rel8 1 1 1 1 0 0 0 0 rel8 {1,0xf100,0xff00,' ',2,BCS, REL8 }, // BCS rel8 1 1 1 1 0 0 0 1 rel8 {1,0xf300,0xff00,' ',2,BEQ, REL8 }, // BEQ rel8 1 1 1 1 0 0 1 1 rel8 @@ -229,8 +229,8 @@ struct xa_dis_entry disass_xa[]= { {1,0xf600,0xff00,' ',2,BPL, REL8 }, // BPL rel8 1 1 1 1 0 1 1 0 rel8 {1,0xfe00,0xff00,' ',2,BR, REL8 }, // BR rel8 1 1 1 1 1 1 1 0 rel8 - {1,0xc500,0xff00,' ',3,CALL, REL16 }, // CALL rel16 1 1 0 0 0 1 0 1 rel16 - {0,0xc600,0xfff8,' ',2,CALL, IREG }, // CALL [Rs] 1 1 0 0 0 1 1 0 0 0 0 0 0 s s s + {1,0xc500,0xff00,'a',3,CALL, REL16 }, // CALL rel16 1 1 0 0 0 1 0 1 rel16 + {0,0xc600,0xfff8,'a',2,CALL, IREG }, // CALL [Rs] 1 1 0 0 0 1 1 0 0 0 0 0 0 s s s {0,0xe200,0xf708,' ',4,CJNE, REG_DIRECT_REL8}, // CJNE Rd, direct, rel8 1 1 1 0 S 0 1 0 d d d d 0 x x x {0,0xe300,0xff0f,' ',4,CJNE, REG_DATA8_REL8}, // CJNE Rd, data8, rel8 1 1 1 0 0 0 1 1 d d d d 0 0 0 0 @@ -285,7 +285,9 @@ struct xa_dis_entry disass_xa[]= { {0,0x97c0,0xfffc,' ',4, JBC, BIT_REL8 }, // JBC bit,rel8 1 0 0 1 0 1 1 1 1 1 0 0 0 0 b b {1,0xd500,0xff00,' ',3, JMP, REL16 }, // JMP rel16 1 1 0 1 0 1 0 1 rel16 {0,0xd670,0xfff8,' ',2, JMP, IREG }, // JMP [Rs] 1 1 0 1 0 1 1 0 0 1 1 1 0 s s s - /* JMP(2) */ + {0,0xd646,0xffff,' ',2, JMP, A_PLUSDPTR }, // JMP [A+dptr] 1 1 0 1 0 1 1 0 0 1 0 0 0 1 1 0 + {0,0xd660,0xfff8,' ',2, JMP, IIREG }, // JMP [[Rs+]] 1 1 0 1 0 1 1 0 0 1 1 0 0 s s s + {0,0x97a0,0xfffc,' ',4, JNB, BIT_REL8 }, // JNB bit,rel8 1 0 0 1 0 1 1 1 1 0 1 0 0 0 b b {1,0xee00,0xff00,' ',2, JNZ, REL8 }, // JNZ rel8 1 1 1 0 1 1 1 0 rel8 {1,0xec00,0xff00,' ',2, JZ, REL8 }, // JZ rel8 1 1 1 0 1 1 0 0 rel8 @@ -316,7 +318,11 @@ struct xa_dis_entry disass_xa[]= { {0,0x9d08,0xff8f,' ',6,MOV, IREGOFF16_DATA16}, // MOV [Rd+offset16], #data16 1 0 0 1 1 1 0 1 0 d d d 1 0 0 0 {0,0x9608,0xff8f,' ',4,MOV, DIRECT_DATA8 }, // MOV direct, #data8 1 0 0 1 0 1 1 0 0 b b b 1 0 0 0 {0,0x9e08,0xff8f,' ',5,MOV, DIRECT_DATA16 }, // MOV direct, #data16 1 0 0 1 0 1 1 0 0 b b b 1 0 0 0 - /* MOV(5) */ + {0,0x9700,0xf788,' ',4,MOV, DIRECT_DIRECT }, // MOV direct, direct 1 0 0 1 S 1 1 1 0 d d d 0 d d d + {0,0x900f,0xff0f,' ',2,MOV, REG_USP }, // MOV Rd, USP 1 0 0 1 0 0 0 0 d d d d 1 1 1 1 + {0,0x980f,0xff0f,' ',2,MOV, USP_REG }, // MOV USP, RS 1 0 0 1 0 0 0 0 s s s s 1 1 1 1 + {0,0x0820,0xfffc,' ',3,MOV, CY_BIT }, // MOV C, bit 0 0 0 0 1 0 0 0 0 0 1 0 0 0 b b + {0,0x0830,0xfffc,' ',3,MOV, BIT_CY }, // MOV bit, C 0 0 0 0 1 0 0 0 0 0 1 1 0 0 b b {0,0x8000,0xf308,' ',2,MOVC, REG_IREGINC }, // MOVC Rd,[Rs+] 1 0 0 0 S 0 0 0 d d d d 0 s s s {0,0x904e,0xffff,' ',2,MOVC, A_APLUSDPTR }, // MOVC A,[A+DPTR] 1 0 0 1 0 0 0 0 0 1 0 0 1 1 1 0 {0,0x904c,0xffff,' ',2,MOVC, A_APLUSPC }, // MOVC A,[A+PC] 1 0 0 1 0 0 0 0 0 1 0 0 1 1 0 0 @@ -348,8 +354,8 @@ struct xa_dis_entry disass_xa[]= { {0,0x9d06,0xff8f,' ',6, OR, IREGOFF16_DATA16}, // OR [Rd+offset16], #data16 1 0 0 1 1 1 0 1 0 d d d 0 1 1 0 {0,0x9606,0xff8f,' ',4, OR, DIRECT_DATA8 }, // OR direct, #data8 1 0 0 1 0 1 1 0 0 b b b 0 1 1 0 {0,0x9e06,0xff8f,' ',5, OR, DIRECT_DATA16 }, // OR direct, #data16 1 0 0 1 0 1 1 0 0 b b b 0 1 1 0 - {0,0x0860,0xfffc,' ',3, ORL, C_BIT }, // ORL C, bit 0 0 0 0 1 0 0 0 0 1 1 0 0 0 b b - {0,0x0870,0xfffc,' ',3, ORL, C_NOTBIT }, // ORL C, /bit 0 0 0 0 1 0 0 0 0 1 1 1 0 0 b b + {0,0x0860,0xfffc,' ',3, ORL, CY_BIT }, // ORL C, bit 0 0 0 0 1 0 0 0 0 1 1 0 0 0 b b + {0,0x0870,0xfffc,' ',3, ORL, CY_NOTBIT }, // ORL C, /bit 0 0 0 0 1 0 0 0 0 1 1 1 0 0 b b {0,0x8710,0xf7f8,' ',3, POP, DIRECT }, // POP direct 1 0 0 0 S 1 1 1 0 0 0 1 0 d d d {1,0x2700,0xb700,' ',2, POP, RLIST }, // POP Rlist 0 H 1 0 S 1 1 1 rlist {0,0x8700,0xf7f8,' ',3, POPU, DIRECT }, // POPU direct 1 0 0 0 S 1 1 1 0 0 0 0 0 d d d