X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=sim%2Fucsim%2Fs51.src%2Fport.cc;h=a02ad7909fb654df0e6bece1cf66834571476d85;hb=f27da39dbcab5678aca6d8462f1cc37a643f37e9;hp=37cf983cf3bc20906bd3bccbc4cf18b2d9443775;hpb=7fe573ea83f6e0762dc73bc493f15fa2a8f6273d;p=fw%2Fsdcc diff --git a/sim/ucsim/s51.src/port.cc b/sim/ucsim/s51.src/port.cc index 37cf983c..a02ad790 100644 --- a/sim/ucsim/s51.src/port.cc +++ b/sim/ucsim/s51.src/port.cc @@ -73,7 +73,7 @@ cl_port::init(void) } default: addr_p= P0; return(1); } - class cl_mem *sfr= uc->mem(MEM_SFR); + class cl_address_space *sfr= uc->address_space(MEM_SFR_ID); if (!sfr) { fprintf(stderr, "No SFR to register port into\n"); @@ -85,14 +85,14 @@ cl_port::init(void) } t_mem -cl_port::read(class cl_cell *cell) +cl_port::read(class cl_memory_cell *cell) { //printf("port[%d] read\n",id); return(cell->get() & port_pins); } void -cl_port::write(class cl_cell *cell, t_mem *val) +cl_port::write(class cl_memory_cell *cell, t_mem *val) { struct ev_port_changed ep; @@ -131,13 +131,14 @@ cl_port::set_cmd(class cl_cmdline *cmdline, class cl_console *con) } else { - con->dd_printf("Error: wrong systax\n"); + con->dd_printf("set hardware port[%d] pins_value\n Set port pins\n", + id); value= 0; } } /*void -cl_port::mem_cell_changed(class cl_mem *mem, t_addr addr) +cl_port::mem_cell_changed(class cl_m *mem, t_addr addr) { cl_hw::mem_cell_changed(mem, addr); t_mem d= sfr->get(); @@ -150,7 +151,7 @@ cl_port::print_info(class cl_console *con) uchar data; con->dd_printf("%s[%d]\n", id_string, id); - data= cell_p->get();//uc->get_mem(MEM_SFR, sfr); + data= cell_p->get(); con->dd_printf("P%d ", id); con->print_bin(data, 8); con->dd_printf(" 0x%02x %3d %c (Value in SFR register)\n", @@ -162,7 +163,6 @@ cl_port::print_info(class cl_console *con) con->dd_printf(" 0x%02x %3d %c (Output of outside circuits)\n", data, data, isprint(data)?data:'.'); - //data= /*uc->*/port_pins/*[id]*/ & sfr->get();//uc->get_mem(MEM_SFR, sfr); data= cell_p->read(); con->dd_printf("Port%d ", id); con->print_bin(data, 8);