X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=sim%2Fucsim%2Fcmd.src%2Fcmdconf.cc;h=f521e8900abb986e1fccb47df4714213937caa7a;hb=5156ec0bb15ef639c2aa78f616a05e3ab0435813;hp=6afd4cab6829f3797218df1f13f2f6c6c8e6859b;hpb=f27cbdc6513b26748661452e50ed3af99fac16a2;p=fw%2Fsdcc

diff --git a/sim/ucsim/cmd.src/cmdconf.cc b/sim/ucsim/cmd.src/cmdconf.cc
index 6afd4cab..f521e890 100644
--- a/sim/ucsim/cmd.src/cmdconf.cc
+++ b/sim/ucsim/cmd.src/cmdconf.cc
@@ -41,64 +41,62 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
  *----------------------------------------------------------------------------
  */
 
-int
-cl_conf_cmd::do_work(class cl_sim *sim,
-		     class cl_cmdline *cmdline, class cl_console *con)
+//int
+//cl_conf_cmd::do_work(class cl_sim *sim,
+//		     class cl_cmdline *cmdline, class cl_console *con)
+COMMAND_DO_WORK_UC(cl_conf_cmd)
 {
   int i;
 
-  con->printf("ucsim version %s\n", VERSIONSTR);
-  con->printf("Type of microcontroller: %s\n", sim->uc->id_string());
-  con->printf("Controller has %d hardware element(s).\n",
-	      sim->uc->hws->count);
-  for (i= 0; i < sim->uc->hws->count; i++)
+  con->dd_printf("ucsim version %s\n", VERSIONSTR);
+  con->dd_printf("Type of microcontroller: %s\n", uc->id_string());
+  con->dd_printf("Controller has %d hardware element(s).\n",
+		 uc->hws->count);
+  for (i= 0; i < uc->hws->count; i++)
     {
-      class cl_hw *hw= (class cl_hw *)(sim->uc->hws->at(i));
-      con->printf("  %s[%d]\n", hw->id_string, hw->id);
-    }
-  con->printf("Memories:\n");
-  for (i= MEM_ROM; i < MEM_TYPES; i++)
-    {
-      class cl_mem *mem= (class cl_mem *)(sim->uc->mems->at(i));
-      if (mem)
-	con->printf("  %s size= 0x%06x %6d width= %2d class= \"%s\"\n",
-		    mem->id_string(), mem->size, mem->size, mem->width,
-		    (mem->class_name)?(mem->class_name):"unknown");
+      class cl_hw *hw= (class cl_hw *)(uc->hws->at(i));
+      con->dd_printf("  %s[%d]\n", hw->id_string, hw->id);
     }
   return(0);
 }
 
 /*
- * Command: conf addmem
+ * Command: conf objects
  *----------------------------------------------------------------------------
  */
 
-int
-cl_conf_addmem_cmd::do_work(class cl_sim *sim,
-			    class cl_cmdline *cmdline, class cl_console *con)
+static void
+conf_objects_cmd_print_node(class cl_console *con,
+			    int indent, class cl_base *node)
+{
+  if (!node)
+    return;
+  int i;
+  for (i= 0; i < indent; i++)
+    con->dd_printf(" ");
+  char *name= node->get_name("unknown");
+  con->dd_printf("%s\n", name);
+  class cl_base *c= node->first_child();
+  while (c)
+    {
+      conf_objects_cmd_print_node(con, indent+2, c);
+      c= node->next_child(c);
+    }
+}
+
+//int
+//cl_conf_addmem_cmd::do_work(class cl_sim *sim,
+//			    class cl_cmdline *cmdline, class cl_console *con)
+COMMAND_DO_WORK_APP(cl_conf_objects_cmd)
 {
-  class cl_mem *mem= 0;
-  class cl_cmd_arg *params[4]= { cmdline->param(0),
+  //class cl_address_space *mem= 0;
+  /*class cl_cmd_arg *params[4]= { cmdline->param(0),
 				 cmdline->param(1),
 				 cmdline->param(2),
-				 cmdline->param(3) };
-  char *mem_class;
-
-  if (cmdline->syntax_match(sim, STRING)) {
-    mem_class= params[0]->value.string.string;
-    enum mem_class type;
-    type= (enum mem_class)get_string_id(mem_classes, mem_class, -1);
-    mem= sim->uc->mk_mem(type, mem_class);
-    if (mem)
-      {
-	class cl_mem *m= sim->uc->mem(type);
-	if (m)
-	  delete m;
-	sim->uc->mems->put_at(type, mem);
-      }
-    else
-      con->printf("Can not make memory \"%s\"\n", mem_class);
-  }
+				 cmdline->param(3) };*/
+  class cl_error *cl_error_base = new cl_error();
+  conf_objects_cmd_print_node(con, 0, /*application*/cl_error_base->get_class());
+  delete cl_error_base;
   return(DD_FALSE);
 }