X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=gdbserver%2Fgdb-server.c;h=e6368ea31be09a357306765de555c3c924cfa741;hb=684d76afa0f36d9c9cc3974f11fd42aa95e22c02;hp=94784fcdb896d7c88fdcc6894d7f52366af73ee2;hpb=7d9f4129abd300c9bb0cb3d9b86a5856cb2b3fb7;p=fw%2Fstlink diff --git a/gdbserver/gdb-server.c b/gdbserver/gdb-server.c index 94784fc..e6368ea 100644 --- a/gdbserver/gdb-server.c +++ b/gdbserver/gdb-server.c @@ -12,10 +12,14 @@ #include #include #include +#ifdef __MINGW32__ +#include "mingw.h" +#else #include #include #include #include +#endif #include @@ -159,15 +163,27 @@ int main(int argc, char** argv) { if(sl == NULL) return 1; break; } - + printf("Chip ID is %08x, Core ID is %08x.\n", sl->chip_id, sl->core_id); sl->verbose=0; current_memory_map = make_memory_map(sl); +#ifdef __MINGW32__ + WSADATA wsadata; + if (WSAStartup(MAKEWORD(2,2),&wsadata) !=0 ) { + goto winsock_error; + } +#endif + while(serve(sl, state.listen_port) == 0); +#ifdef __MINGW32__ +winsock_error: + WSACleanup(); +#endif + /* Switch back to mass storage mode before closing. */ stlink_run(sl); stlink_exit_debug_mode(sl); @@ -176,13 +192,79 @@ int main(int argc, char** argv) { return 0; } +static const char* const target_description_F4 = + "" + "" + "" + " arm" + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + " " + ""; + static const char* const memory_map_template_F4 = "" "" "" " " // code = sram, bootrom or flash; flash is bigger - " " // sram + " " // ccm ram + " " // sram " " //Sectors 0..3 " 0x4000" //16kB " " @@ -203,15 +285,15 @@ static const char* const memory_map_template = "" "" - " " // code = sram, bootrom or flash; flash is bigger - " " // sram 8k - " " - " 0x%x" + " " // code = sram, bootrom or flash; flash is bigger + " " // sram 8k + " " + " 0x%zx" " " " " // peripheral regs " " // cortex regs - " " // bootrom - " " // option byte area + " " // bootrom + " " // option byte area ""; char* make_memory_map(stlink_t *sl) { @@ -232,7 +314,7 @@ char* make_memory_map(stlink_t *sl) { } -/* +/* * DWT_COMP0 0xE0001020 * DWT_MASK0 0xE0001024 * DWT_FUNCTION0 0xE0001028 @@ -265,7 +347,7 @@ static void init_data_watchpoints(stlink_t *sl) { #endif // set trcena in debug command to turn on dwt unit - stlink_write_debug32(sl, 0xE000EDFC, + stlink_write_debug32(sl, 0xE000EDFC, stlink_read_debug32(sl, 0xE000EDFC) | (1<<24)); // make sure all watchpoints are cleared @@ -291,7 +373,7 @@ static int add_data_watchpoint(stlink_t *sl, enum watchfun wf, stm32_addr_t addr mask++; } - if((mask != -1) && (mask < 16)) { + if((mask != (uint32_t)-1) && (mask < 16)) { for(i = 0; i < DATA_WATCH_NUM; i++) { // is this an empty slot ? if(data_watches[i].fun == WATCHDISABLED) { @@ -461,7 +543,7 @@ static int flash_add_block(stm32_addr_t addr, unsigned length, stlink_t *sl) { } static int flash_populate(stm32_addr_t addr, uint8_t* data, unsigned length) { - int fit_blocks = 0, fit_length = 0; + unsigned int fit_blocks = 0, fit_length = 0; for(struct flash_block* fb = flash_root; fb; fb = fb->next) { /* Block: ------X------Y-------- @@ -551,9 +633,10 @@ int serve(stlink_t *sl, int port) { } unsigned int val = 1; - setsockopt(sock, SOL_SOCKET, SO_REUSEADDR, &val, sizeof(val)); + setsockopt(sock, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val)); - struct sockaddr_in serv_addr = {0}; + struct sockaddr_in serv_addr; + memset(&serv_addr,0,sizeof(struct sockaddr_in)); serv_addr.sin_family = AF_INET; serv_addr.sin_addr.s_addr = inet_addr("127.0.0.1"); serv_addr.sin_port = htons(port); @@ -576,7 +659,7 @@ int serve(stlink_t *sl, int port) { printf("Listening at *:%d...\n", port); int client = accept(sock, NULL, NULL); - signal (SIGINT, SIG_DFL); + //signal (SIGINT, SIG_DFL); if(client < 0) { perror("accept"); return 1; @@ -631,19 +714,24 @@ int serve(stlink_t *sl, int port) { #endif if(!strcmp(queryName, "Supported")) { - reply = strdup("PacketSize=3fff;qXfer:memory-map:read+"); + if(sl->chip_id==STM32_CHIPID_F4) { + reply = strdup("PacketSize=3fff;qXfer:memory-map:read+;qXfer:features:read+"); + } + else { + reply = strdup("PacketSize=3fff;qXfer:memory-map:read+"); + } } else if(!strcmp(queryName, "Xfer")) { - char *type, *op, *s_addr, *s_length; + char *type, *op, *__s_addr, *s_length; char *tok = params; char *annex __attribute__((unused)); type = strsep(&tok, ":"); op = strsep(&tok, ":"); annex = strsep(&tok, ":"); - s_addr = strsep(&tok, ","); + __s_addr = strsep(&tok, ","); s_length = tok; - unsigned addr = strtoul(s_addr, NULL, 16), + unsigned addr = strtoul(__s_addr, NULL, 16), length = strtoul(s_length, NULL, 16); #ifdef DEBUG @@ -656,6 +744,9 @@ int serve(stlink_t *sl, int port) { if(!strcmp(type, "memory-map") && !strcmp(op, "read")) data = current_memory_map; + if(!strcmp(type, "features") && !strcmp(op, "read")) + data = target_description_F4; + if(data) { unsigned data_length = strlen(data); if(addr + length > data_length) @@ -677,31 +768,31 @@ int serve(stlink_t *sl, int port) { } else { params = separator + 1; } - - if (!strncmp(params,"7265",4)) {// resume + + if (!strncmp(params,"726573756d65",12)) {// resume #ifdef DEBUG printf("Rcmd: resume\n"); #endif stlink_run(sl); reply = strdup("OK"); - } else if (!strncmp(params,"6861",4)) { //half + } else if (!strncmp(params,"68616c74",8)) { //halt reply = strdup("OK"); - + stlink_force_debug(sl); #ifdef DEBUG printf("Rcmd: halt\n"); #endif - } else if (!strncmp(params,"7265",4)) { //reset + } else if (!strncmp(params,"7265736574",10)) { //reset reply = strdup("OK"); - + stlink_force_debug(sl); stlink_reset(sl); init_code_breakpoints(sl); init_data_watchpoints(sl); - + #ifdef DEBUG printf("Rcmd: reset\n"); #endif @@ -711,7 +802,7 @@ int serve(stlink_t *sl, int port) { #endif } - + } if(reply == NULL) @@ -729,13 +820,13 @@ int serve(stlink_t *sl, int port) { cmdName++; // vCommand -> Command if(!strcmp(cmdName, "FlashErase")) { - char *s_addr, *s_length; + char *__s_addr, *s_length; char *tok = params; - s_addr = strsep(&tok, ","); + __s_addr = strsep(&tok, ","); s_length = tok; - unsigned addr = strtoul(s_addr, NULL, 16), + unsigned addr = strtoul(__s_addr, NULL, 16), length = strtoul(s_length, NULL, 16); #ifdef DEBUG @@ -749,13 +840,13 @@ int serve(stlink_t *sl, int port) { reply = strdup("OK"); } } else if(!strcmp(cmdName, "FlashWrite")) { - char *s_addr, *data; + char *__s_addr, *data; char *tok = params; - s_addr = strsep(&tok, ":"); + __s_addr = strsep(&tok, ":"); data = tok; - unsigned addr = strtoul(s_addr, NULL, 16); + unsigned addr = strtoul(__s_addr, NULL, 16); unsigned data_length = status - (data - packet); // Length of decoded data cannot be more than @@ -763,7 +854,7 @@ int serve(stlink_t *sl, int port) { // Additional byte is reserved for alignment fix. uint8_t *decoded = calloc(data_length + 1, 1); unsigned dec_index = 0; - for(int i = 0; i < data_length; i++) { + for(unsigned int i = 0; i < data_length; i++) { if(data[i] == 0x7d) { i++; decoded[dec_index++] = data[i] ^ 0x20; @@ -863,6 +954,30 @@ int serve(stlink_t *sl, int port) { } else if(id == 0x19) { stlink_read_reg(sl, 16, ®p); myreg = htonl(regp.xpsr); + } else if(id == 0x1A) { + stlink_read_reg(sl, 17, ®p); + myreg = htonl(regp.main_sp); + } else if(id == 0x1B) { + stlink_read_reg(sl, 18, ®p); + myreg = htonl(regp.process_sp); + } else if(id == 0x1C) { + stlink_read_unsupported_reg(sl, id, ®p); + myreg = htonl(regp.control); + } else if(id == 0x1D) { + stlink_read_unsupported_reg(sl, id, ®p); + myreg = htonl(regp.faultmask); + } else if(id == 0x1E) { + stlink_read_unsupported_reg(sl, id, ®p); + myreg = htonl(regp.basepri); + } else if(id == 0x1F) { + stlink_read_unsupported_reg(sl, id, ®p); + myreg = htonl(regp.primask); + } else if(id >= 0x20 && id < 0x40) { + stlink_read_unsupported_reg(sl, id, ®p); + myreg = htonl(regp.s[id-0x20]); + } else if(id == 0x40) { + stlink_read_unsupported_reg(sl, id, ®p); + myreg = htonl(regp.fpscr); } else { reply = strdup("E00"); } @@ -884,6 +999,22 @@ int serve(stlink_t *sl, int port) { stlink_write_reg(sl, ntohl(value), reg); } else if(reg == 0x19) { stlink_write_reg(sl, ntohl(value), 16); + } else if(reg == 0x1A) { + stlink_write_reg(sl, ntohl(value), 17); + } else if(reg == 0x1B) { + stlink_write_reg(sl, ntohl(value), 18); + } else if(reg == 0x1C) { + stlink_write_unsupported_reg(sl, ntohl(value), reg, ®p); + } else if(reg == 0x1D) { + stlink_write_unsupported_reg(sl, ntohl(value), reg, ®p); + } else if(reg == 0x1E) { + stlink_write_unsupported_reg(sl, ntohl(value), reg, ®p); + } else if(reg == 0x1F) { + stlink_write_unsupported_reg(sl, ntohl(value), reg, ®p); + } else if(reg >= 0x20 && reg < 0x40) { + stlink_write_unsupported_reg(sl, ntohl(value), reg, ®p); + } else if(reg == 0x40) { + stlink_write_unsupported_reg(sl, ntohl(value), reg, ®p); } else { reply = strdup("E00"); } @@ -919,7 +1050,7 @@ int serve(stlink_t *sl, int port) { count : count + 4 - (count % 4)); reply = calloc(count * 2 + 1, 1); - for(int i = 0; i < count; i++) { + for(unsigned int i = 0; i < count; i++) { reply[i * 2 + 0] = hex[sl->q_buf[i + adj_start] >> 4]; reply[i * 2 + 1] = hex[sl->q_buf[i + adj_start] & 0xf]; } @@ -935,7 +1066,7 @@ int serve(stlink_t *sl, int port) { stm32_addr_t start = strtoul(s_start, NULL, 16); unsigned count = strtoul(s_count, NULL, 16); - for(int i = 0; i < count; i ++) { + for(unsigned int i = 0; i < count; i ++) { char hex[3] = { hexdata[i*2], hexdata[i*2+1], 0 }; uint8_t byte = strtoul(hex, NULL, 16); sl->q_buf[i] = byte; @@ -977,13 +1108,14 @@ int serve(stlink_t *sl, int port) { wf = WATCHREAD; } else { wf = WATCHACCESS; - if(add_data_watchpoint(sl, wf, addr, len) < 0) { - reply = strdup("E00"); - } else { - reply = strdup("OK"); - break; - } } + + if(add_data_watchpoint(sl, wf, addr, len) < 0) { + reply = strdup("E00"); + } else { + reply = strdup("OK"); + break; + } } default: