X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=gdbserver%2Fgdb-server.c;h=c0166eb1ecb7738147aa535435da2a14da301989;hb=2da33f84cd0d776737d49c2480dfe80b7036af83;hp=d902eab7ea8658af2cc0f25f199630a8919d2a77;hpb=bddf605006b85ccdf7a3ad2be5bb8bcd9b414609;p=fw%2Fstlink
diff --git a/gdbserver/gdb-server.c b/gdbserver/gdb-server.c
index d902eab..c0166eb 100644
--- a/gdbserver/gdb-server.c
+++ b/gdbserver/gdb-server.c
@@ -325,7 +325,11 @@ static const char* const memory_map_template_F4_HD =
""
" " // code = sram, bootrom or flash; flash is bigger
" " // ccm ram
- " " // sram
+ " " // sram
+ " " // fmc bank 1 (nor/psram/sram)
+ " " // fmc bank 2 & 3 (nand flash)
+ " " // fmc bank 4 (pc card)
+ " " // fmc sdram bank 1 & 2
" " //Sectors 0..3
" 0x4000" //16kB
" "
@@ -341,6 +345,28 @@ static const char* const memory_map_template_F4_HD =
" " // option byte area
"";
+static const char* const memory_map_template_F2 =
+ ""
+ ""
+ ""
+ " " // code = sram, bootrom or flash; flash is bigger
+ " " // sram
+ " " //Sectors 0..3
+ " 0x4000" //16kB
+ " "
+ " " //Sector 4
+ " 0x10000" //64kB
+ " "
+ " " //Sectors 5..
+ " 0x20000" //128kB
+ " "
+ " " // peripheral regs
+ " " // cortex regs
+ " " // bootrom
+ " " // option byte area
+ "";
+
static const char* const memory_map_template =
""
"" // option byte area
"";
+static const char* const memory_map_template_F7 =
+ ""
+ ""
+ ""
+ " " // ITCM ram 16kB
+ " " // ITCM flash
+ " " // sram
+ " " // Sectors 0..3
+ " 0x8000" // 32kB
+ " "
+ " " // Sector 4
+ " 0x20000" // 128kB
+ " "
+ " " // Sectors 5..7
+ " 0x40000" // 128kB
+ " "
+ " " // peripheral regs
+ " " // AHB3 Peripherals
+ " " // cortex regs
+ " " // bootrom
+ " " // option byte area
+ "";
+
char* make_memory_map(stlink_t *sl) {
/* This will be freed in serve() */
char* map = malloc(4096);
map[0] = '\0';
- if(sl->chip_id==STM32_CHIPID_F4) {
+ if(sl->chip_id==STM32_CHIPID_F4 || sl->chip_id==STM32_CHIPID_F446) {
strcpy(map, memory_map_template_F4);
+ } else if(sl->chip_id==STM32_CHIPID_F4 || sl->chip_id==STM32_CHIPID_F7) {
+ strcpy(map, memory_map_template_F7);
} else if(sl->chip_id==STM32_CHIPID_F4_HD) {
strcpy(map, memory_map_template_F4_HD);
+ } else if(sl->chip_id==STM32_CHIPID_F2) {
+ snprintf(map, 4096, memory_map_template_F2,
+ sl->flash_size,
+ sl->sram_size,
+ sl->flash_size - 0x20000,
+ sl->sys_base, sl->sys_size);
} else {
snprintf(map, 4096, memory_map_template,
sl->flash_size,
@@ -647,8 +705,8 @@ static int flash_go(stlink_t *sl) {
for(struct flash_block* fb = flash_root; fb; fb = fb->next) {
DLOG("flash_do: block %08x -> %04x\n", fb->addr, fb->length);
- unsigned length = fb->length;
for(stm32_addr_t page = fb->addr; page < fb->addr + fb->length; page += FLASH_PAGE) {
+ unsigned length = fb->length - (page - fb->addr);
//Update FLASH_PAGE
stlink_calculate_pagesize(sl, page);