X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=gdbserver%2Fgdb-server.c;fp=gdbserver%2Fgdb-server.c;h=6033040a3bcff515608b24cd5e82bd38c0e0c75b;hb=83a5eb2ed34ed78edacd92a69f366b89728ac5d0;hp=e7676219ce8151d84d80498ccd0a75cf7275fb08;hpb=794a560ebf95fcc97a56b89827d273cf0f726c87;p=fw%2Fstlink diff --git a/gdbserver/gdb-server.c b/gdbserver/gdb-server.c index e767621..6033040 100644 --- a/gdbserver/gdb-server.c +++ b/gdbserver/gdb-server.c @@ -1,5 +1,5 @@ /* -*- tab-width:8 -*- */ - +#define DEBUG 0 /* Copyright (C) 2011 Peter Zotov Use of this source code is governed by a BSD-style @@ -28,23 +28,14 @@ #define STRINGIFY(name) STRINGIFY_inner(name) #define FLASH_BASE 0x08000000 + +//Allways update the FLASH_PAGE before each use, by calling stlink_calculate_pagesize #define FLASH_PAGE (sl->flash_pgsz) -#define FLASH_PAGE_MASK (~((1 << 10) - 1)) -#define FLASH_SIZE (FLASH_PAGE * 128) static const char hex[] = "0123456789abcdef"; static const char* current_memory_map = NULL; -/* - * Chip IDs are explained in the appropriate programming manual for the - * DBGMCU_IDCODE register (0xE0042000) - */ - -#define CORE_M3_R1 0x1BA00477 -#define CORE_M3_R2 0x4BA00477 -#define CORE_M4_R0 0x2BA01477 - typedef struct _st_state_t { // things from command line, bleh int stlink_version; @@ -169,16 +160,9 @@ int main(int argc, char** argv) { break; } - uint32_t chip_id = sl->chip_id; - uint32_t core_id = sl->core_id; + printf("Chip ID is %08x, Core ID is %08x.\n", sl->chip_id, sl->core_id); - /* Fix chip_id for F4 */ - if (((chip_id & 0xFFF) == 0x411) && (core_id == CORE_M4_R0)) { - printf("Fixing wrong chip_id for STM32F4 Rev A errata\n"); - chip_id = 0x413; - } - - printf("Chip ID is %08x, Core ID is %08x.\n", chip_id, core_id); + sl->verbose=0; current_memory_map = make_memory_map(sl); @@ -192,6 +176,28 @@ int main(int argc, char** argv) { return 0; } +static const char* const memory_map_template_F4 = + "" + "" + "" + " " // code = sram, bootrom or flash; flash is bigger + " " // sram + " " //Sectors 0..3 + " 0x4000" //16kB + " " + " " //Sector 4 + " 0x10000" //64kB + " " + " " //Sectors 5..11 + " 0x20000" //128kB + " " + " " // peripheral regs + " " // cortex regs + " " // bootrom + " " // option byte area + ""; + static const char* const memory_map_template = "" "chip_id==STM32F4_CHIP_ID) { + strcpy(map, memory_map_template_F4); + } else { + snprintf(map, 4096, memory_map_template, sl->flash_size, sl->sram_size, sl->flash_size, sl->flash_pgsz, sl->sys_base, sl->sys_size); - + } return map; } @@ -445,13 +454,14 @@ struct flash_block { static struct flash_block* flash_root; -static int flash_add_block(stm32_addr_t addr, unsigned length, - stlink_t *sl) { - if(addr < FLASH_BASE || addr + length > FLASH_BASE + FLASH_SIZE) { +static int flash_add_block(stm32_addr_t addr, unsigned length, stlink_t *sl) { + + if(addr < FLASH_BASE || addr + length > FLASH_BASE + sl->flash_size) { fprintf(stderr, "flash_add_block: incorrect bounds\n"); return -1; } + stlink_calculate_pagesize(sl, addr); if(addr % FLASH_PAGE != 0 || length % FLASH_PAGE != 0) { fprintf(stderr, "flash_add_block: unaligned block\n"); return -1; @@ -522,17 +532,18 @@ static int flash_go(stlink_t *sl) { unsigned length = fb->length; for(stm32_addr_t page = fb->addr; page < fb->addr + fb->length; page += FLASH_PAGE) { + + //Update FLASH_PAGE + stlink_calculate_pagesize(sl, page); + #ifdef DEBUG printf("flash_do: page %08x\n", page); #endif - stlink_erase_flash_page(sl, page); - if(stlink_write_flash(sl, page, fb->data + (page - fb->addr), length > FLASH_PAGE ? FLASH_PAGE : length) < 0) goto error; - } - + } } stlink_reset(sl);