X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=flash%2Fmain.c;h=8f3a149ba2dc20531c96c43c526fd06425cc3cf9;hb=c2e22f961dd6ea3e44774131f781d6da230f313a;hp=f838d923268aa22594cf3a6c8c8164734e303d73;hpb=19b8c645402463b2303200cedda6d84f3c6c6582;p=fw%2Fstlink

diff --git a/flash/main.c b/flash/main.c
index f838d92..8f3a149 100644
--- a/flash/main.c
+++ b/flash/main.c
@@ -106,13 +106,13 @@ int main(int ac, char** av)
 
   if (o.devname != NULL) /* stlinkv1 */
   {
-    sl = stlink_v1_open(50);
+    sl = stlink_v1_open(50, 1);
     if (sl == NULL) goto on_error;
     sl->verbose = 50;
   }
   else /* stlinkv2 */
   {
-    sl = stlink_open_usb(50);
+    sl = stlink_open_usb(50, 1);
     if (sl == NULL) goto on_error;
     sl->verbose = 50;
   }
@@ -123,6 +123,17 @@ int main(int ac, char** av)
   if (stlink_current_mode(sl) != STLINK_DEV_DEBUG_MODE)
     stlink_enter_swd_mode(sl);
 
+// Disable DMA - Set All DMA CCR Registers to zero. - AKS 1/7/2013
+  if (sl->chip_id == STM32_CHIPID_F4)
+  {
+    memset(sl->q_buf,0,4);
+	for (int i=0;i<8;i++) {
+	    stlink_write_mem32(sl,0x40026000+0x10+0x18*i,4);
+	    stlink_write_mem32(sl,0x40026400+0x10+0x18*i,4);
+	    stlink_write_mem32(sl,0x40026000+0x24+0x18*i,4);
+	    stlink_write_mem32(sl,0x40026400+0x24+0x18*i,4);
+	}
+  }
   if (o.cmd == DO_WRITE) /* write */
   {
     if ((o.addr >= sl->flash_base) &&
@@ -135,7 +146,7 @@ int main(int ac, char** av)
 	}
     }
    else if ((o.addr >= sl->sram_base) &&
-	     (o.addr < sl->sram_base + sl->sram_size))
+	     (o.addr < sl->sram_base + sl->sram_size)) {
 	err = stlink_fwrite_sram(sl, o.filename, o.addr);
 	if (err == -1)
 	{
@@ -143,7 +154,7 @@ int main(int ac, char** av)
 	    goto on_error;
 	}
    }
-  else if (o.cmd == DO_ERASE) 
+  } else if (o.cmd == DO_ERASE) 
   {
      err = stlink_erase_flash_mass(sl);
     if (err == -1)
@@ -154,6 +165,12 @@ int main(int ac, char** av)
   }
   else /* read */
   {
+    if ((o.addr >= sl->flash_base) && (o.size == 0) &&
+	(o.addr < sl->flash_base + sl->flash_size))
+        o.size = sl->flash_size;
+    else if ((o.addr >= sl->sram_base) && (o.size == 0) &&
+	     (o.addr < sl->sram_base + sl->sram_size))
+        o.size = sl->sram_size;
     err = stlink_fread(sl, o.filename, o.addr, o.size);
     if (err == -1)
     {